[PATCH] D128584: [X86][AMX] Split greedy RA for tile register

[LuoYuanke via Phabricator via llvm-commits]

LuoYuanke created this revision.
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When we fill the shape to tile configure memory, the shape is gotten
from AMX pseudo instruction. However the register for the shape may be
split or spilled by greedy RA. That cause we fill the shape to config
memory after ldtilecfg is executed, so that the shape configuration
would be wrong.
This patch is to split the tile register allocation from greedy register
allocation, so that after tile registers are allocated the shape
registers are still virtual register. The shape register only may be
redefined or multi-defined by phi elimination pass, two address pass.
That doesn't affect tile register configuration.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D128584

Files:
  llvm/include/llvm/CodeGen/TargetPassConfig.h
  llvm/lib/CodeGen/TargetPassConfig.cpp
  llvm/lib/Target/X86/X86RegisterInfo.cpp
  llvm/lib/Target/X86/X86RegisterInfo.h
  llvm/lib/Target/X86/X86TargetMachine.cpp
  llvm/lib/Target/X86/X86TileConfig.cpp
  llvm/test/CodeGen/X86/AMX/amx-across-func.ll
  llvm/test/CodeGen/X86/AMX/amx-greedy-ra-spill-shape.ll
  llvm/test/CodeGen/X86/AMX/amx-greedy-ra.ll
  llvm/test/CodeGen/X86/AMX/amx-lower-tile-copy.ll
  llvm/test/CodeGen/X86/AMX/amx-spill-merge.ll
  llvm/test/CodeGen/X86/opt-pipeline.ll
  llvm/test/CodeGen/X86/statepoint-ra.ll

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