[PATCH] D128572: [LoongArch] Add codegen support for division operations

[Lu Weining via Phabricator via llvm-commits]

SixWeining added a comment.

In D128572#3609897 <https://reviews.llvm.org/D128572#3609897>, @xen0n wrote:

> Trapping division/modulus operations are signatures of MIPS codegen, and indeed here the trapping-by-default behavior and the flag seem to come from MIPS. However, as division-by-zero in LLVM IR is undefined behavior, why can't we just omit the trapping behavior altogether (and match RISCV in this regard), or at least disable the trapping by default?

Good question! This is  what I have ever thought. In fact I don't know why mips needs to check zero-divide by default. riscv and aarch64 do not check and I'm not sure it is because their ISAs define zero-divide having an fixed result while Mips and LoongArch do not.
Currently the upstramed gcc checks zero-divide by default, so here I do as it to keep consistent.


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https://reviews.llvm.org/D128572