[PATCH] D128572: [LoongArch] Add codegen support for division operations

[WÁNG Xuěruì via Phabricator via llvm-commits]

xen0n added a comment.

Trapping division/modulus operations are signatures of MIPS codegen, and indeed here the trapping-by-default behavior and the flag seem to come from MIPS. However, as division-by-zero in LLVM IR is undefined behavior, why can't we just omit the trapping behavior altogether (and match RISCV in this regard), or at least disable the trapping by default?


Repository:
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  https://reviews.llvm.org/D128572/new/

https://reviews.llvm.org/D128572