[PATCH] D128310: [RISCV] Move vfma_vl+fneg_vl matching to DAG combine.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 23 23:32:53 PDT 2022
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td:1271
// 14.6 Vector Single-Width Floating-Point Fused Multiply-Add Instructions.
-foreach vti = AllFloatVectors in {
- // NOTE: We choose VFMADD because it has the most commuting freedom. So it
- // works best with how TwoAddressInstructionPass tries commuting.
- defvar suffix = vti.LMul.MX;
- def : Pat<(vti.Vector (riscv_fma_vl vti.RegClass:$rs1, vti.RegClass:$rd,
- vti.RegClass:$rs2, (vti.Mask true_mask),
- VLOpFrag)),
- (!cast<Instruction>("PseudoVFMADD_VV_"# suffix)
- vti.RegClass:$rd, vti.RegClass:$rs1, vti.RegClass:$rs2,
- GPR:$vl, vti.Log2SEW, TAIL_AGNOSTIC)>;
- def : Pat<(vti.Vector (riscv_fma_vl vti.RegClass:$rs1, vti.RegClass:$rd,
- vti.RegClass:$rs2, (vti.Mask V0),
- VLOpFrag)),
- (!cast<Instruction>("PseudoVFMADD_VV_"# suffix #"_MASK")
- vti.RegClass:$rd, vti.RegClass:$rs1, vti.RegClass:$rs2,
- (vti.Mask V0), GPR:$vl, vti.Log2SEW, TAIL_AGNOSTIC)>;
-
- def : Pat<(vti.Vector (riscv_fma_vl vti.RegClass:$rs1, vti.RegClass:$rd,
- (riscv_fneg_vl vti.RegClass:$rs2,
- (vti.Mask true_mask),
- VLOpFrag),
- (vti.Mask true_mask),
- VLOpFrag)),
- (!cast<Instruction>("PseudoVFMSUB_VV_"# suffix)
- vti.RegClass:$rd, vti.RegClass:$rs1, vti.RegClass:$rs2,
- GPR:$vl, vti.Log2SEW, TAIL_AGNOSTIC)>;
- def : Pat<(vti.Vector (riscv_fma_vl vti.RegClass:$rs1, vti.RegClass:$rd,
- (riscv_fneg_vl vti.RegClass:$rs2,
- (vti.Mask srcvalue),
- VLOpFrag),
- (vti.Mask V0),
- VLOpFrag)),
- (!cast<Instruction>("PseudoVFMSUB_VV_"# suffix #"_MASK")
- vti.RegClass:$rd, vti.RegClass:$rs1, vti.RegClass:$rs2,
- (vti.Mask V0), GPR:$vl, vti.Log2SEW, TAIL_AGNOSTIC)>;
-
- def : Pat<(vti.Vector (riscv_fma_vl (riscv_fneg_vl vti.RegClass:$rs1,
- (vti.Mask srcvalue),
- VLOpFrag),
- vti.RegClass:$rd,
- (riscv_fneg_vl vti.RegClass:$rs2,
- (vti.Mask srcvalue),
- VLOpFrag),
- (vti.Mask true_mask),
- VLOpFrag)),
- (!cast<Instruction>("PseudoVFNMADD_VV_"# suffix)
- vti.RegClass:$rd, vti.RegClass:$rs1, vti.RegClass:$rs2,
- GPR:$vl, vti.Log2SEW, TAIL_AGNOSTIC)>;
- def : Pat<(vti.Vector (riscv_fma_vl (riscv_fneg_vl vti.RegClass:$rs1,
- (vti.Mask srcvalue),
- VLOpFrag),
- vti.RegClass:$rd,
- (riscv_fneg_vl vti.RegClass:$rs2,
- (vti.Mask srcvalue),
- VLOpFrag),
- (vti.Mask V0),
- VLOpFrag)),
- (!cast<Instruction>("PseudoVFNMADD_VV_"# suffix #"_MASK")
- vti.RegClass:$rd, vti.RegClass:$rs1, vti.RegClass:$rs2,
- (vti.Mask V0), GPR:$vl, vti.Log2SEW, TAIL_AGNOSTIC)>;
-
- def : Pat<(vti.Vector (riscv_fma_vl (riscv_fneg_vl vti.RegClass:$rs1,
- (vti.Mask srcvalue),
- VLOpFrag),
- vti.RegClass:$rd, vti.RegClass:$rs2,
- (vti.Mask true_mask),
- VLOpFrag)),
- (!cast<Instruction>("PseudoVFNMSUB_VV_"# suffix)
- vti.RegClass:$rd, vti.RegClass:$rs1, vti.RegClass:$rs2,
- GPR:$vl, vti.Log2SEW, TAIL_AGNOSTIC)>;
- def : Pat<(vti.Vector (riscv_fma_vl (riscv_fneg_vl vti.RegClass:$rs1,
- (vti.Mask srcvalue),
- VLOpFrag),
- vti.RegClass:$rd, vti.RegClass:$rs2,
- (vti.Mask V0),
- VLOpFrag)),
- (!cast<Instruction>("PseudoVFNMSUB_VV_"# suffix #"_MASK")
- vti.RegClass:$rd, vti.RegClass:$rs1, vti.RegClass:$rs2,
- (vti.Mask V0), GPR:$vl, vti.Log2SEW, TAIL_AGNOSTIC)>;
-
- // The choice of VFMADD here is arbitrary, vfmadd.vf and vfmacc.vf are equally
- // commutable.
- def : Pat<(vti.Vector (riscv_fma_vl (SplatFPOp vti.ScalarRegClass:$rs1),
- vti.RegClass:$rd, vti.RegClass:$rs2,
- (vti.Mask true_mask),
- VLOpFrag)),
- (!cast<Instruction>("PseudoVFMADD_V" # vti.ScalarSuffix # "_" # suffix)
- vti.RegClass:$rd, vti.ScalarRegClass:$rs1, vti.RegClass:$rs2,
- GPR:$vl, vti.Log2SEW, TAIL_AGNOSTIC)>;
- def : Pat<(vti.Vector (riscv_fma_vl (SplatFPOp vti.ScalarRegClass:$rs1),
- vti.RegClass:$rd, vti.RegClass:$rs2,
- (vti.Mask V0),
- VLOpFrag)),
- (!cast<Instruction>("PseudoVFMADD_V" # vti.ScalarSuffix # "_" # suffix # "_MASK")
- vti.RegClass:$rd, vti.ScalarRegClass:$rs1, vti.RegClass:$rs2,
- (vti.Mask V0), GPR:$vl, vti.Log2SEW, TAIL_AGNOSTIC)>;
-
- def : Pat<(vti.Vector (riscv_fma_vl (SplatFPOp vti.ScalarRegClass:$rs1),
- vti.RegClass:$rd,
- (riscv_fneg_vl vti.RegClass:$rs2,
- (vti.Mask srcvalue),
- VLOpFrag),
- (vti.Mask true_mask),
- VLOpFrag)),
- (!cast<Instruction>("PseudoVFMSUB_V" # vti.ScalarSuffix # "_" # suffix)
- vti.RegClass:$rd, vti.ScalarRegClass:$rs1, vti.RegClass:$rs2,
- GPR:$vl, vti.Log2SEW, TAIL_AGNOSTIC)>;
- def : Pat<(vti.Vector (riscv_fma_vl (SplatFPOp vti.ScalarRegClass:$rs1),
- vti.RegClass:$rd,
- (riscv_fneg_vl vti.RegClass:$rs2,
- (vti.Mask srcvalue),
- VLOpFrag),
- (vti.Mask V0),
- VLOpFrag)),
- (!cast<Instruction>("PseudoVFMSUB_V" # vti.ScalarSuffix # "_" # suffix # "_MASK")
- vti.RegClass:$rd, vti.ScalarRegClass:$rs1, vti.RegClass:$rs2,
- (vti.Mask V0), GPR:$vl, vti.Log2SEW, TAIL_AGNOSTIC)>;
-
- def : Pat<(vti.Vector (riscv_fma_vl (SplatFPOp vti.ScalarRegClass:$rs1),
- (riscv_fneg_vl vti.RegClass:$rd,
- (vti.Mask srcvalue),
- VLOpFrag),
- (riscv_fneg_vl vti.RegClass:$rs2,
- (vti.Mask srcvalue),
- VLOpFrag),
- (vti.Mask true_mask),
- VLOpFrag)),
- (!cast<Instruction>("PseudoVFNMADD_V" # vti.ScalarSuffix # "_" # suffix)
- vti.RegClass:$rd, vti.ScalarRegClass:$rs1, vti.RegClass:$rs2,
- GPR:$vl, vti.Log2SEW, TAIL_AGNOSTIC)>;
- def : Pat<(vti.Vector (riscv_fma_vl (SplatFPOp vti.ScalarRegClass:$rs1),
- (riscv_fneg_vl vti.RegClass:$rd,
- (vti.Mask srcvalue),
- VLOpFrag),
- (riscv_fneg_vl vti.RegClass:$rs2,
- (vti.Mask srcvalue),
- VLOpFrag),
- (vti.Mask V0),
- VLOpFrag)),
- (!cast<Instruction>("PseudoVFNMADD_V" # vti.ScalarSuffix # "_" # suffix # "_MASK")
- vti.RegClass:$rd, vti.ScalarRegClass:$rs1, vti.RegClass:$rs2,
- (vti.Mask V0), GPR:$vl, vti.Log2SEW, TAIL_AGNOSTIC)>;
-
- def : Pat<(vti.Vector (riscv_fma_vl (SplatFPOp vti.ScalarRegClass:$rs1),
- (riscv_fneg_vl vti.RegClass:$rd,
- (vti.Mask srcvalue),
- VLOpFrag),
- vti.RegClass:$rs2,
- (vti.Mask true_mask),
- VLOpFrag)),
- (!cast<Instruction>("PseudoVFNMSUB_V" # vti.ScalarSuffix # "_" # suffix)
- vti.RegClass:$rd, vti.ScalarRegClass:$rs1, vti.RegClass:$rs2,
- GPR:$vl, vti.Log2SEW, TAIL_AGNOSTIC)>;
- def : Pat<(vti.Vector (riscv_fma_vl (SplatFPOp vti.ScalarRegClass:$rs1),
- (riscv_fneg_vl vti.RegClass:$rd,
- (vti.Mask srcvalue),
- VLOpFrag),
- vti.RegClass:$rs2,
- (vti.Mask V0),
- VLOpFrag)),
- (!cast<Instruction>("PseudoVFNMSUB_V" # vti.ScalarSuffix # "_" # suffix # "_MASK")
- vti.RegClass:$rd, vti.ScalarRegClass:$rs1, vti.RegClass:$rs2,
- (vti.Mask V0), GPR:$vl, vti.Log2SEW, TAIL_AGNOSTIC)>;
-
- // The splat might be negated.
- def : Pat<(vti.Vector (riscv_fma_vl (riscv_fneg_vl (SplatFPOp vti.ScalarRegClass:$rs1),
- (vti.Mask srcvalue),
- VLOpFrag),
- vti.RegClass:$rd,
- (riscv_fneg_vl vti.RegClass:$rs2,
- (vti.Mask srcvalue),
- VLOpFrag),
- (vti.Mask true_mask),
- VLOpFrag)),
- (!cast<Instruction>("PseudoVFNMADD_V" # vti.ScalarSuffix # "_" # suffix)
- vti.RegClass:$rd, vti.ScalarRegClass:$rs1, vti.RegClass:$rs2,
- GPR:$vl, vti.Log2SEW, TAIL_AGNOSTIC)>;
- def : Pat<(vti.Vector (riscv_fma_vl (riscv_fneg_vl (SplatFPOp vti.ScalarRegClass:$rs1),
- (vti.Mask srcvalue),
- VLOpFrag),
- vti.RegClass:$rd,
- (riscv_fneg_vl vti.RegClass:$rs2,
- (vti.Mask srcvalue),
- VLOpFrag),
- (vti.Mask V0),
- VLOpFrag)),
- (!cast<Instruction>("PseudoVFNMADD_V" # vti.ScalarSuffix # "_" # suffix # "_MASK")
- vti.RegClass:$rd, vti.ScalarRegClass:$rs1, vti.RegClass:$rs2,
- (vti.Mask V0), GPR:$vl, vti.Log2SEW, TAIL_AGNOSTIC)>;
-
- def : Pat<(vti.Vector (riscv_fma_vl (riscv_fneg_vl (SplatFPOp vti.ScalarRegClass:$rs1),
- (vti.Mask srcvalue),
- VLOpFrag),
- vti.RegClass:$rd, vti.RegClass:$rs2,
- (vti.Mask true_mask),
- VLOpFrag)),
- (!cast<Instruction>("PseudoVFNMSUB_V" # vti.ScalarSuffix # "_" # suffix)
- vti.RegClass:$rd, vti.ScalarRegClass:$rs1, vti.RegClass:$rs2,
- GPR:$vl, vti.Log2SEW, TAIL_AGNOSTIC)>;
- def : Pat<(vti.Vector (riscv_fma_vl (riscv_fneg_vl (SplatFPOp vti.ScalarRegClass:$rs1),
- (vti.Mask srcvalue),
- VLOpFrag),
- vti.RegClass:$rd, vti.RegClass:$rs2,
- (vti.Mask V0),
- VLOpFrag)),
- (!cast<Instruction>("PseudoVFNMSUB_V" # vti.ScalarSuffix # "_" # suffix # "_MASK")
- vti.RegClass:$rd, vti.ScalarRegClass:$rs1, vti.RegClass:$rs2,
- (vti.Mask V0), GPR:$vl, vti.Log2SEW, TAIL_AGNOSTIC)>;
-}
+// NOTE: We choose VFMADD because it has the most commuting freedom. So it
+// works best with how TwoAddressInstructionPass tries commuting.
----------------
frasercrmck wrote:
> I took this comment to refer to the choice of opcode for a generic `fma`. If we've already decided the opcode we're doing a straight 1:1 mapping, so I don't think it holds?
We could still pick VFMACC by rearranging the operands from the ISD node. But the ISD naming does imply a choice was already made. hmmm...
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https://reviews.llvm.org/D128310/new/
https://reviews.llvm.org/D128310
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