[PATCH] D128483: [AVR] Support unaligned store

[Ayke via Phabricator via llvm-commits]

aykevl created this revision.
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This patch really just extends D39946 <https://reviews.llvm.org/D39946> towards stores as well as loads.
While the patch is in SelectionDAGBuilder, it only applies to AVR (the only target that supports unaligned atomic operations).


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D128483

Files:
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
  llvm/test/CodeGen/AVR/unaligned-atomic-loads.ll
  llvm/test/CodeGen/AVR/unaligned-atomic-ops.ll


Index: llvm/test/CodeGen/AVR/unaligned-atomic-ops.ll
===================================================================
--- llvm/test/CodeGen/AVR/unaligned-atomic-ops.ll
+++ llvm/test/CodeGen/AVR/unaligned-atomic-ops.ll
@@ -1,6 +1,6 @@
 ; RUN: llc -mattr=addsubiw < %s -march=avr | FileCheck %s
 
-; This verifies that the middle end can handle an unaligned atomic load.
+; This verifies that the backend can handle an unaligned atomic load and store.
 ;
 ; In the past, an assertion inside the SelectionDAGBuilder would always
 ; hit an assertion for unaligned loads and stores.
@@ -14,6 +14,7 @@
 start:
   %a = getelementptr inbounds %AtomicI16, %AtomicI16* %self, i16 0, i32 0, i32 0
   load atomic i16, i16* %a seq_cst, align 1
+  store atomic i16 5, i16* %a seq_cst, align 1
   ret void
 }
 
Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
===================================================================
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -4730,7 +4730,8 @@
   EVT MemVT =
       TLI.getMemValueType(DAG.getDataLayout(), I.getValueOperand()->getType());
 
-  if (I.getAlignment() < MemVT.getSizeInBits() / 8)
+  if (!TLI.supportsUnalignedAtomics() &&
+      I.getAlignment() < MemVT.getSizeInBits() / 8)
     report_fatal_error("Cannot generate unaligned atomic store");
 
   auto Flags = TLI.getStoreMemOperandFlags(I, DAG.getDataLayout());


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