[PATCH] D127861: [AArch64][SME] Add SME addha/va intrinsics

[Sagar Kulkarni via Phabricator via llvm-commits]

sagarkulkarni19 added inline comments.


================
Comment at: llvm/lib/Target/AArch64/SMEInstrFormats.td:190-191
+def ADDVA_MPPZ_PSEUDO_S : sme_add_vector_to_tile_pseudo<ZPR32>;
+def ADDHA_MPPZ_PSEUDO_D : sme_add_vector_to_tile_pseudo<ZPR64>;
+def ADDVA_MPPZ_PSEUDO_D : sme_add_vector_to_tile_pseudo<ZPR64>;
+
----------------
Need to enclose these instruction definitions in `let Predicates = [HasSMEI64] {..}`?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D127861/new/

https://reviews.llvm.org/D127861