[PATCH] D128382: [LLD] Two tweaks to symbol ordering scheme

[YongKang Zhu via Phabricator via llvm-commits]

yozhu added a comment.

Another way to look at the logic in this code is that, if no branch thunk is required, then to symbol ordering there is no difference between targeting RISC machine and CISC machine.  While for CISC machine we just simply follow what ordering says, we should do the same for RISC machine as well.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D128382/new/

https://reviews.llvm.org/D128382