[llvm] 60a3215 - [Tests] Remove unnecessary bitcasts from opaque pointer tests (NFC)
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 22 05:22:36 PDT 2022
Author: Nikita Popov
Date: 2022-06-22T14:15:46+02:00
New Revision: 60a32157a5c62179841ad5bee5052adebf942ed8
URL: https://github.com/llvm/llvm-project/commit/60a32157a5c62179841ad5bee5052adebf942ed8
DIFF: https://github.com/llvm/llvm-project/commit/60a32157a5c62179841ad5bee5052adebf942ed8.diff
LOG: [Tests] Remove unnecessary bitcasts from opaque pointer tests (NFC)
Previously left these behind due to the required instruction
renumbering, drop them now. This more accurately represents
opaque pointer input IR.
Also drop duplicate opaque pointer check lines in one SROA test.
Added:
Modified:
llvm/test/Transforms/EarlyCSE/AArch64/intrinsics.ll
llvm/test/Transforms/EarlyCSE/X86/preserve_memoryssa.ll
llvm/test/Transforms/InstSimplify/ConstProp/timeout.ll
llvm/test/Transforms/InstSimplify/require-dominator.ll
llvm/test/Transforms/InstSimplify/simplify-nested-bitcast.ll
llvm/test/Transforms/SROA/address-spaces.ll
llvm/test/Transforms/SROA/alignment.ll
llvm/test/Transforms/SROA/alloca-address-space.ll
llvm/test/Transforms/SROA/assume.ll
llvm/test/Transforms/SROA/basictest.ll
llvm/test/Transforms/SROA/dbg-addr-diamond.ll
llvm/test/Transforms/SROA/dbg-inline.ll
llvm/test/Transforms/SROA/dbg-single-piece.ll
llvm/test/Transforms/SROA/dead-inst.ll
llvm/test/Transforms/SROA/irregular-type.ll
llvm/test/Transforms/SROA/mem-par-metadata-sroa.ll
llvm/test/Transforms/SROA/non-capturing-call-readonly.ll
llvm/test/Transforms/SROA/non-integral-pointers.ll
llvm/test/Transforms/SROA/pointer-offset-size.ll
llvm/test/Transforms/SROA/ppcf128-no-fold.ll
llvm/test/Transforms/SROA/scalable-vectors.ll
llvm/test/Transforms/SROA/slice-order-independence.ll
llvm/test/Transforms/SROA/slice-width.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/EarlyCSE/AArch64/intrinsics.ll b/llvm/test/Transforms/EarlyCSE/AArch64/intrinsics.ll
index ee090988001d8..1cb8deaadc143 100644
--- a/llvm/test/Transforms/EarlyCSE/AArch64/intrinsics.ll
+++ b/llvm/test/Transforms/EarlyCSE/AArch64/intrinsics.ll
@@ -19,14 +19,12 @@ for.cond: ; preds = %for.body, %entry
br i1 %cmp, label %for.body, label %for.end
for.body: ; preds = %for.cond
- %0 = bitcast ptr %a to ptr
- %1 = bitcast <4 x i32> %s.coerce.fca.0.extract to <16 x i8>
- %2 = bitcast <4 x i32> %s.coerce.fca.1.extract to <16 x i8>
+ %0 = bitcast <4 x i32> %s.coerce.fca.0.extract to <16 x i8>
+ %1 = bitcast <4 x i32> %s.coerce.fca.1.extract to <16 x i8>
+ %2 = bitcast <16 x i8> %0 to <4 x i32>
%3 = bitcast <16 x i8> %1 to <4 x i32>
- %4 = bitcast <16 x i8> %2 to <4 x i32>
- call void @llvm.aarch64.neon.st2.v4i32.p0(<4 x i32> %3, <4 x i32> %4, ptr %0)
- %5 = bitcast ptr %a to ptr
- %vld2 = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0(ptr %5)
+ call void @llvm.aarch64.neon.st2.v4i32.p0(<4 x i32> %2, <4 x i32> %3, ptr %a)
+ %vld2 = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0(ptr %a)
%vld2.fca.0.extract = extractvalue { <4 x i32>, <4 x i32> } %vld2, 0
%vld2.fca.1.extract = extractvalue { <4 x i32>, <4 x i32> } %vld2, 1
%call = call <4 x i32> @vaddq_s32(<4 x i32> %vld2.fca.0.extract, <4 x i32> %vld2.fca.0.extract)
@@ -54,15 +52,13 @@ for.cond: ; preds = %for.body, %entry
br i1 %cmp, label %for.body, label %for.end
for.body: ; preds = %for.cond
- %0 = bitcast ptr %a to ptr
- %1 = bitcast <4 x i32> %s.coerce.fca.0.extract to <16 x i8>
- %2 = bitcast <4 x i32> %s.coerce.fca.1.extract to <16 x i8>
+ %0 = bitcast <4 x i32> %s.coerce.fca.0.extract to <16 x i8>
+ %1 = bitcast <4 x i32> %s.coerce.fca.1.extract to <16 x i8>
+ %2 = bitcast <16 x i8> %0 to <4 x i32>
%3 = bitcast <16 x i8> %1 to <4 x i32>
- %4 = bitcast <16 x i8> %2 to <4 x i32>
- call void @llvm.aarch64.neon.st2.v4i32.p0(<4 x i32> %3, <4 x i32> %3, ptr %0)
- call void @llvm.aarch64.neon.st2.v4i32.p0(<4 x i32> %3, <4 x i32> %4, ptr %0)
- %5 = bitcast ptr %a to ptr
- %vld2 = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0(ptr %5)
+ call void @llvm.aarch64.neon.st2.v4i32.p0(<4 x i32> %2, <4 x i32> %2, ptr %a)
+ call void @llvm.aarch64.neon.st2.v4i32.p0(<4 x i32> %2, <4 x i32> %3, ptr %a)
+ %vld2 = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0(ptr %a)
%vld2.fca.0.extract = extractvalue { <4 x i32>, <4 x i32> } %vld2, 0
%vld2.fca.1.extract = extractvalue { <4 x i32>, <4 x i32> } %vld2, 1
%call = call <4 x i32> @vaddq_s32(<4 x i32> %vld2.fca.0.extract, <4 x i32> %vld2.fca.0.extract)
@@ -90,12 +86,10 @@ for.cond: ; preds = %for.body, %entry
br i1 %cmp, label %for.body, label %for.end
for.body: ; preds = %for.cond
- %0 = bitcast ptr %a to ptr
- %vld2 = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0(ptr %0)
+ %vld2 = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0(ptr %a)
%vld2.fca.0.extract = extractvalue { <4 x i32>, <4 x i32> } %vld2, 0
%vld2.fca.1.extract = extractvalue { <4 x i32>, <4 x i32> } %vld2, 1
- %1 = bitcast ptr %a to ptr
- %vld22 = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0(ptr %1)
+ %vld22 = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0(ptr %a)
%vld22.fca.0.extract = extractvalue { <4 x i32>, <4 x i32> } %vld22, 0
%vld22.fca.1.extract = extractvalue { <4 x i32>, <4 x i32> } %vld22, 1
%call = call <4 x i32> @vaddq_s32(<4 x i32> %vld2.fca.0.extract, <4 x i32> %vld22.fca.0.extract)
@@ -124,15 +118,13 @@ for.cond: ; preds = %for.body, %entry
br i1 %cmp, label %for.body, label %for.end
for.body: ; preds = %for.cond
- %0 = bitcast ptr %a to ptr
- %1 = bitcast <4 x i32> %s.coerce.fca.0.extract to <16 x i8>
- %2 = bitcast <4 x i32> %s.coerce.fca.1.extract to <16 x i8>
+ %0 = bitcast <4 x i32> %s.coerce.fca.0.extract to <16 x i8>
+ %1 = bitcast <4 x i32> %s.coerce.fca.1.extract to <16 x i8>
+ %2 = bitcast <16 x i8> %0 to <4 x i32>
%3 = bitcast <16 x i8> %1 to <4 x i32>
- %4 = bitcast <16 x i8> %2 to <4 x i32>
- call void @llvm.aarch64.neon.st2.v4i32.p0(<4 x i32> %3, <4 x i32> %4, ptr %0)
+ call void @llvm.aarch64.neon.st2.v4i32.p0(<4 x i32> %2, <4 x i32> %3, ptr %a)
store i32 0, ptr %b, align 4
- %5 = bitcast ptr %a to ptr
- %vld2 = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0(ptr %5)
+ %vld2 = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0(ptr %a)
%vld2.fca.0.extract = extractvalue { <4 x i32>, <4 x i32> } %vld2, 0
%vld2.fca.1.extract = extractvalue { <4 x i32>, <4 x i32> } %vld2, 1
%call = call <4 x i32> @vaddq_s32(<4 x i32> %vld2.fca.0.extract, <4 x i32> %vld2.fca.0.extract)
@@ -160,14 +152,12 @@ for.cond: ; preds = %for.body, %entry
br i1 %cmp, label %for.body, label %for.end
for.body: ; preds = %for.cond
- %0 = bitcast ptr %a to ptr
- %1 = bitcast <4 x i32> %s.coerce.fca.0.extract to <16 x i8>
- %2 = bitcast <4 x i32> %s.coerce.fca.1.extract to <16 x i8>
+ %0 = bitcast <4 x i32> %s.coerce.fca.0.extract to <16 x i8>
+ %1 = bitcast <4 x i32> %s.coerce.fca.1.extract to <16 x i8>
+ %2 = bitcast <16 x i8> %0 to <4 x i32>
%3 = bitcast <16 x i8> %1 to <4 x i32>
- %4 = bitcast <16 x i8> %2 to <4 x i32>
- call void @llvm.aarch64.neon.st2.v4i32.p0(<4 x i32> %3, <4 x i32> %4, ptr %0)
- %5 = bitcast ptr %a to ptr
- %vld3 = call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3.v4i32.p0(ptr %5)
+ call void @llvm.aarch64.neon.st2.v4i32.p0(<4 x i32> %2, <4 x i32> %3, ptr %a)
+ %vld3 = call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3.v4i32.p0(ptr %a)
%vld3.fca.0.extract = extractvalue { <4 x i32>, <4 x i32>, <4 x i32> } %vld3, 0
%vld3.fca.2.extract = extractvalue { <4 x i32>, <4 x i32>, <4 x i32> } %vld3, 2
%call = call <4 x i32> @vaddq_s32(<4 x i32> %vld3.fca.0.extract, <4 x i32> %vld3.fca.2.extract)
@@ -196,15 +186,13 @@ for.cond: ; preds = %for.body, %entry
br i1 %cmp, label %for.body, label %for.end
for.body: ; preds = %for.cond
- %0 = bitcast ptr %a to ptr
- %1 = bitcast <4 x i32> %s.coerce.fca.0.extract to <16 x i8>
- %2 = bitcast <4 x i32> %s.coerce.fca.1.extract to <16 x i8>
+ %0 = bitcast <4 x i32> %s.coerce.fca.0.extract to <16 x i8>
+ %1 = bitcast <4 x i32> %s.coerce.fca.1.extract to <16 x i8>
+ %2 = bitcast <16 x i8> %0 to <4 x i32>
%3 = bitcast <16 x i8> %1 to <4 x i32>
- %4 = bitcast <16 x i8> %2 to <4 x i32>
- call void @llvm.aarch64.neon.st3.v4i32.p0(<4 x i32> %4, <4 x i32> %3, <4 x i32> %3, ptr %0)
- call void @llvm.aarch64.neon.st2.v4i32.p0(<4 x i32> %3, <4 x i32> %3, ptr %0)
- %5 = bitcast ptr %a to ptr
- %vld3 = call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3.v4i32.p0(ptr %5)
+ call void @llvm.aarch64.neon.st3.v4i32.p0(<4 x i32> %3, <4 x i32> %2, <4 x i32> %2, ptr %a)
+ call void @llvm.aarch64.neon.st2.v4i32.p0(<4 x i32> %2, <4 x i32> %2, ptr %a)
+ %vld3 = call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3.v4i32.p0(ptr %a)
%vld3.fca.0.extract = extractvalue { <4 x i32>, <4 x i32>, <4 x i32> } %vld3, 0
%vld3.fca.1.extract = extractvalue { <4 x i32>, <4 x i32>, <4 x i32> } %vld3, 1
%call = call <4 x i32> @vaddq_s32(<4 x i32> %vld3.fca.0.extract, <4 x i32> %vld3.fca.0.extract)
diff --git a/llvm/test/Transforms/EarlyCSE/X86/preserve_memoryssa.ll b/llvm/test/Transforms/EarlyCSE/X86/preserve_memoryssa.ll
index 2ac895b09e712..df88d0361e8af 100644
--- a/llvm/test/Transforms/EarlyCSE/X86/preserve_memoryssa.ll
+++ b/llvm/test/Transforms/EarlyCSE/X86/preserve_memoryssa.ll
@@ -95,12 +95,10 @@ entry:
br i1 undef, label %if.then274, label %for.cond404
if.then274: ; preds = %if.end256
- %0 = bitcast ptr %exl.i to ptr
%arrayidx.i = getelementptr inbounds [5 x i32], ptr %exl.i, i64 0, i64 1
%arrayidx1.i = getelementptr inbounds [5 x i32], ptr %exl.i, i64 0, i64 2
%arrayidx2.i = getelementptr inbounds [5 x i32], ptr %exl.i, i64 0, i64 3
%arrayidx3.i = getelementptr inbounds [5 x i32], ptr %exl.i, i64 0, i64 4
- %1 = bitcast ptr %exl.i to ptr
%arrayidx.i1034 = getelementptr inbounds [5 x i32], ptr %exl.i, i64 0, i64 1
%arrayidx1.i1035 = getelementptr inbounds [5 x i32], ptr %exl.i, i64 0, i64 2
%arrayidx2.i1036 = getelementptr inbounds [5 x i32], ptr %exl.i, i64 0, i64 3
@@ -108,7 +106,6 @@ if.then274: ; preds = %if.end256
unreachable
for.cond404: ; preds = %if.end256
- %2 = bitcast ptr %exl.i to ptr
%arrayidx.i960 = getelementptr inbounds [5 x i32], ptr %exl.i, i64 0, i64 1
%arrayidx1.i961 = getelementptr inbounds [5 x i32], ptr %exl.i, i64 0, i64 2
%arrayidx2.i962 = getelementptr inbounds [5 x i32], ptr %exl.i, i64 0, i64 3
@@ -117,14 +114,13 @@ for.cond404: ; preds = %if.end256
%arrayidx3.i963 = getelementptr inbounds [5 x i32], ptr %exl.i, i64 0, i64 4
; MemoryUse(LoE)
- %3 = load ptr, ptr @gnodeArray, align 8
- %arrayidx6.i968 = getelementptr inbounds ptr, ptr %3, i64 undef
+ %0 = load ptr, ptr @gnodeArray, align 8
+ %arrayidx6.i968 = getelementptr inbounds ptr, ptr %0, i64 undef
; MemoryUse(1) MayAlias
- %4 = load ptr, ptr %arrayidx6.i968, align 8
+ %1 = load ptr, ptr %arrayidx6.i968, align 8
br i1 undef, label %for.cond26.preheader.i974, label %if.then20.for.body_crit_edge.i999
for.cond26.preheader.i974: ; preds = %if.then20.i996
- %5 = bitcast ptr %exl.i to ptr
%arrayidx.i924 = getelementptr inbounds [5 x i32], ptr %exl.i, i64 0, i64 1
%arrayidx1.i925 = getelementptr inbounds [5 x i32], ptr %exl.i, i64 0, i64 2
%arrayidx2.i926 = getelementptr inbounds [5 x i32], ptr %exl.i, i64 0, i64 3
diff --git a/llvm/test/Transforms/InstSimplify/ConstProp/timeout.ll b/llvm/test/Transforms/InstSimplify/ConstProp/timeout.ll
index 00674bb7a3849..3417d4a6c1f40 100644
--- a/llvm/test/Transforms/InstSimplify/ConstProp/timeout.ll
+++ b/llvm/test/Transforms/InstSimplify/ConstProp/timeout.ll
@@ -23,14 +23,12 @@ for.cond: ; preds = %for.inc, %entry
for.body: ; preds = %for.cond
%1 = load ptr, ptr %s, align 4
- %2 = bitcast ptr %1 to ptr
- %add.ptr = getelementptr inbounds i8, ptr %2, i32 4
- %3 = ptrtoint ptr %add.ptr to i32
- %4 = load ptr, ptr %s, align 4
- %5 = bitcast ptr %4 to ptr
- %add.ptr1 = getelementptr inbounds i8, ptr %5, i32 4
- %6 = ptrtoint ptr %add.ptr1 to i32
- %rem = urem i32 %6, 2
+ %add.ptr = getelementptr inbounds i8, ptr %1, i32 4
+ %2 = ptrtoint ptr %add.ptr to i32
+ %3 = load ptr, ptr %s, align 4
+ %add.ptr1 = getelementptr inbounds i8, ptr %3, i32 4
+ %4 = ptrtoint ptr %add.ptr1 to i32
+ %rem = urem i32 %4, 2
%cmp2 = icmp eq i32 %rem, 0
br i1 %cmp2, label %cond.true, label %cond.false
@@ -38,35 +36,34 @@ cond.true: ; preds = %for.body
br label %cond.end
cond.false: ; preds = %for.body
- %7 = load ptr, ptr %s, align 4
- %8 = bitcast ptr %7 to ptr
- %add.ptr3 = getelementptr inbounds i8, ptr %8, i32 4
- %9 = ptrtoint ptr %add.ptr3 to i32
- %rem4 = urem i32 %9, 2
+ %5 = load ptr, ptr %s, align 4
+ %add.ptr3 = getelementptr inbounds i8, ptr %5, i32 4
+ %6 = ptrtoint ptr %add.ptr3 to i32
+ %rem4 = urem i32 %6, 2
br label %cond.end
cond.end: ; preds = %cond.false, %cond.true
%cond = phi i32 [ 0, %cond.true ], [ %rem4, %cond.false ]
- %add = add i32 %3, %cond
- %10 = inttoptr i32 %add to ptr
- %11 = load ptr, ptr %s, align 4
- %next = getelementptr inbounds %struct.ST, ptr %11, i32 0, i32 0
- store ptr %10, ptr %next, align 4
- %12 = load ptr, ptr %s, align 4
- %next5 = getelementptr inbounds %struct.ST, ptr %12, i32 0, i32 0
- %13 = load ptr, ptr %next5, align 4
- store ptr %13, ptr %s, align 4
+ %add = add i32 %2, %cond
+ %7 = inttoptr i32 %add to ptr
+ %8 = load ptr, ptr %s, align 4
+ %next = getelementptr inbounds %struct.ST, ptr %8, i32 0, i32 0
+ store ptr %7, ptr %next, align 4
+ %9 = load ptr, ptr %s, align 4
+ %next5 = getelementptr inbounds %struct.ST, ptr %9, i32 0, i32 0
+ %10 = load ptr, ptr %next5, align 4
+ store ptr %10, ptr %s, align 4
br label %for.inc
for.inc: ; preds = %cond.end
- %14 = load i32, ptr %j, align 4
- %inc = add nsw i32 %14, 1
+ %11 = load i32, ptr %j, align 4
+ %inc = add nsw i32 %11, 1
store i32 %inc, ptr %j, align 4
br label %for.cond
for.end: ; preds = %for.cond
- %15 = load ptr, ptr %s, align 4
- %next6 = getelementptr inbounds %struct.ST, ptr %15, i32 0, i32 0
+ %12 = load ptr, ptr %s, align 4
+ %next6 = getelementptr inbounds %struct.ST, ptr %12, i32 0, i32 0
store ptr null, ptr %next6, align 4
ret void
}
diff --git a/llvm/test/Transforms/InstSimplify/require-dominator.ll b/llvm/test/Transforms/InstSimplify/require-dominator.ll
index 320aba95a51e4..c0dbba973b80a 100644
--- a/llvm/test/Transforms/InstSimplify/require-dominator.ll
+++ b/llvm/test/Transforms/InstSimplify/require-dominator.ll
@@ -12,14 +12,13 @@ define void @foo(ptr) #1 align 2 {
; <label>:2:
%3 = tail call ptr @_Znwm(i64 56) #10
- %4 = bitcast ptr %3 to ptr
%p = load ptr, ptr undef, align 8
- %5 = icmp eq ptr %p, %4
- br i1 %5, label %exit, label %6
+ %4 = icmp eq ptr %p, %3
+ br i1 %4, label %exit, label %5
; <label>:6:
- %7 = icmp eq ptr %p, null
- br i1 %7, label %exit, label %8
+ %6 = icmp eq ptr %p, null
+ br i1 %6, label %exit, label %7
; <label>:8:
br label %exit
diff --git a/llvm/test/Transforms/InstSimplify/simplify-nested-bitcast.ll b/llvm/test/Transforms/InstSimplify/simplify-nested-bitcast.ll
index ecdc21b4a572e..565e306e45d02 100644
--- a/llvm/test/Transforms/InstSimplify/simplify-nested-bitcast.ll
+++ b/llvm/test/Transforms/InstSimplify/simplify-nested-bitcast.ll
@@ -19,10 +19,8 @@ entry:
define i32 @f0(ptr addrspace(1), ptr addrspace(4)) #1 {
entry:
%2 = getelementptr inbounds %struct.__block_literal_generic, ptr addrspace(4) %1, i64 0, i32 3
- %3 = bitcast ptr addrspace(4) %1 to ptr addrspace(4)
- %4 = bitcast ptr addrspace(4) %2 to ptr addrspace(4)
- %5 = load ptr, ptr addrspace(4) %4, align 8
- %call = tail call i32 %5(ptr addrspace(4) %3, ptr addrspace(1) %0) #2
+ %3 = load ptr, ptr addrspace(4) %2, align 8
+ %call = tail call i32 %3(ptr addrspace(4) %1, ptr addrspace(1) %0) #2
ret i32 %call
}
diff --git a/llvm/test/Transforms/SROA/address-spaces.ll b/llvm/test/Transforms/SROA/address-spaces.ll
index d899c34437680..70e1a682d7bfc 100644
--- a/llvm/test/Transforms/SROA/address-spaces.ll
+++ b/llvm/test/Transforms/SROA/address-spaces.ll
@@ -65,8 +65,7 @@ define void @copy_struct([5 x i64] %in.coerce, ptr addrspace(1) align 4 %ptr) {
;
for.end:
%in = alloca %struct.struct_test_27.0.13, align 8
- %0 = bitcast ptr %in to ptr
- store [5 x i64] %in.coerce, ptr %0, align 8
+ store [5 x i64] %in.coerce, ptr %in, align 8
%scevgep9 = getelementptr %struct.struct_test_27.0.13, ptr %in, i32 0, i32 4, i32 0
call void @llvm.memcpy.p1.p0.i32(ptr addrspace(1) align 4 %ptr, ptr align 4 %scevgep9, i32 16, i1 false)
ret void
@@ -87,10 +86,8 @@ define void @pr27557() {
; CHECK-NEXT: ret void
;
%1 = alloca %union.anon, align 8
- %2 = bitcast ptr %1 to ptr
- store ptr @g, ptr %2, align 8
- %3 = bitcast ptr %1 to ptr
- store ptr addrspace(3) @l, ptr %3, align 8
+ store ptr @g, ptr %1, align 8
+ store ptr addrspace(3) @l, ptr %1, align 8
ret void
}
@@ -103,11 +100,9 @@ define ptr @pr27557.alt() {
; CHECK-NEXT: ret ptr inttoptr (i64 ptrtoint (ptr addrspace(2) @l2 to i64) to ptr)
;
%1 = alloca %union.anon, align 8
- %2 = bitcast ptr %1 to ptr
- store ptr addrspace(2) @l2, ptr %2, align 8
- %3 = bitcast ptr %1 to ptr
- %4 = load ptr, ptr %3, align 8
- ret ptr %4
+ store ptr addrspace(2) @l2, ptr %1, align 8
+ %2 = load ptr, ptr %1, align 8
+ ret ptr %2
}
; Make sure pre-splitting doesn't try to introduce an illegal bitcast
diff --git a/llvm/test/Transforms/SROA/alignment.ll b/llvm/test/Transforms/SROA/alignment.ll
index d130d326949f7..b0f18341ea3b0 100644
--- a/llvm/test/Transforms/SROA/alignment.ll
+++ b/llvm/test/Transforms/SROA/alignment.ll
@@ -219,8 +219,7 @@ define dso_local i32 @pr45010(ptr %A) {
%B = alloca %struct, align 4
%1 = load i32, ptr %A, align 4
store atomic volatile i32 %1, ptr %B release, align 4
- %2 = bitcast ptr %B to ptr
- %x = load atomic volatile i32, ptr %2 acquire, align 4
+ %x = load atomic volatile i32, ptr %B acquire, align 4
ret i32 %x
}
diff --git a/llvm/test/Transforms/SROA/alloca-address-space.ll b/llvm/test/Transforms/SROA/alloca-address-space.ll
index bc880211f8ac3..d4f305c39c8fe 100644
--- a/llvm/test/Transforms/SROA/alloca-address-space.ll
+++ b/llvm/test/Transforms/SROA/alloca-address-space.ll
@@ -64,8 +64,7 @@ define void @copy_struct([5 x i64] %in.coerce, ptr addrspace(1) align 4 %ptr) {
;
for.end:
%in = alloca %struct.struct_test_27.0.13, align 8, addrspace(2)
- %0 = bitcast ptr addrspace(2) %in to ptr addrspace(2)
- store [5 x i64] %in.coerce, ptr addrspace(2) %0, align 8
+ store [5 x i64] %in.coerce, ptr addrspace(2) %in, align 8
%scevgep9 = getelementptr %struct.struct_test_27.0.13, ptr addrspace(2) %in, i32 0, i32 4, i32 0
call void @llvm.memcpy.p1.p2.i32(ptr addrspace(1) align 4 %ptr, ptr addrspace(2) align 4 %scevgep9, i32 16, i1 false)
ret void
@@ -86,10 +85,8 @@ define void @pr27557() {
; CHECK-NEXT: ret void
;
%1 = alloca %union.anon, align 8, addrspace(2)
- %2 = bitcast ptr addrspace(2) %1 to ptr addrspace(2)
- store ptr @g, ptr addrspace(2) %2, align 8
- %3 = bitcast ptr addrspace(2) %1 to ptr addrspace(2)
- store ptr addrspace(3) @l, ptr addrspace(2) %3, align 8
+ store ptr @g, ptr addrspace(2) %1, align 8
+ store ptr addrspace(3) @l, ptr addrspace(2) %1, align 8
ret void
}
@@ -102,11 +99,9 @@ define ptr @pr27557.alt() {
; CHECK-NEXT: ret ptr inttoptr (i64 ptrtoint (ptr addrspace(4) @l4 to i64) to ptr)
;
%1 = alloca %union.anon, align 8, addrspace(2)
- %2 = bitcast ptr addrspace(2) %1 to ptr addrspace(2)
- store ptr addrspace(4) @l4, ptr addrspace(2) %2, align 8
- %3 = bitcast ptr addrspace(2) %1 to ptr addrspace(2)
- %4 = load ptr, ptr addrspace(2) %3, align 8
- ret ptr %4
+ store ptr addrspace(4) @l4, ptr addrspace(2) %1, align 8
+ %2 = load ptr, ptr addrspace(2) %1, align 8
+ ret ptr %2
}
; Test load from and store to non-zero address space.
diff --git a/llvm/test/Transforms/SROA/assume.ll b/llvm/test/Transforms/SROA/assume.ll
index fa619a4a9b86f..d17d23a4c64b8 100644
--- a/llvm/test/Transforms/SROA/assume.ll
+++ b/llvm/test/Transforms/SROA/assume.ll
@@ -19,9 +19,7 @@ define void @_ZN2bg2baIiEC2ES_(i64 %v) {
entry:
%y = alloca i64, align 8
store i64 %v, ptr %y, align 8
- %0 = bitcast ptr %y to ptr
- %1 = bitcast ptr %0 to ptr
- call void @llvm.assume(i1 true) [ "nonnull"(ptr %1) ]
+ call void @llvm.assume(i1 true) [ "nonnull"(ptr %y) ]
ret void
}
diff --git a/llvm/test/Transforms/SROA/basictest.ll b/llvm/test/Transforms/SROA/basictest.ll
index 6c02dfbfd1936..347318137ed36 100644
--- a/llvm/test/Transforms/SROA/basictest.ll
+++ b/llvm/test/Transforms/SROA/basictest.ll
@@ -665,23 +665,17 @@ define void @test14(...) nounwind uwtable {
entry:
%a = alloca %test14.struct
%p = alloca ptr
- %0 = bitcast ptr %a to ptr
- %1 = getelementptr i8, ptr %0, i64 12
- %2 = bitcast ptr %1 to ptr
- %3 = getelementptr inbounds %test14.struct, ptr %2, i32 0, i32 0
- %4 = getelementptr inbounds %test14.struct, ptr %a, i32 0, i32 0
- %5 = bitcast ptr %3 to ptr
- %6 = bitcast ptr %4 to ptr
+ %0 = getelementptr i8, ptr %a, i64 12
+ %1 = load i32, ptr %a, align 4
+ store i32 %1, ptr %0, align 4
+ %2 = getelementptr inbounds i32, ptr %0, i32 1
+ %3 = getelementptr inbounds i32, ptr %a, i32 1
+ %4 = load i32, ptr %3, align 4
+ store i32 %4, ptr %2, align 4
+ %5 = getelementptr inbounds i32, ptr %0, i32 2
+ %6 = getelementptr inbounds i32, ptr %a, i32 2
%7 = load i32, ptr %6, align 4
store i32 %7, ptr %5, align 4
- %8 = getelementptr inbounds i32, ptr %5, i32 1
- %9 = getelementptr inbounds i32, ptr %6, i32 1
- %10 = load i32, ptr %9, align 4
- store i32 %10, ptr %8, align 4
- %11 = getelementptr inbounds i32, ptr %5, i32 2
- %12 = getelementptr inbounds i32, ptr %6, i32 2
- %13 = load i32, ptr %12, align 4
- store i32 %13, ptr %11, align 4
ret void
}
@@ -1121,21 +1115,20 @@ define void @PR14059.1(ptr %d) {
entry:
%X.sroa.0.i = alloca double, align 8
- %0 = bitcast ptr %X.sroa.0.i to ptr
- call void @llvm.lifetime.start.p0(i64 -1, ptr %0)
+ call void @llvm.lifetime.start.p0(i64 -1, ptr %X.sroa.0.i)
; Store to the low 32-bits...
store i32 0, ptr %X.sroa.0.i, align 8
; Also use a memset to the middle 32-bits for fun.
- %X.sroa.0.2.raw_idx2.i = getelementptr inbounds i8, ptr %0, i32 2
+ %X.sroa.0.2.raw_idx2.i = getelementptr inbounds i8, ptr %X.sroa.0.i, i32 2
call void @llvm.memset.p0.i64(ptr %X.sroa.0.2.raw_idx2.i, i8 0, i64 4, i1 false)
; Or a memset of the whole thing.
- call void @llvm.memset.p0.i64(ptr %0, i8 0, i64 8, i1 false)
+ call void @llvm.memset.p0.i64(ptr %X.sroa.0.i, i8 0, i64 8, i1 false)
; Write to the high 32-bits with a memcpy.
- %X.sroa.0.4.raw_idx4.i = getelementptr inbounds i8, ptr %0, i32 4
+ %X.sroa.0.4.raw_idx4.i = getelementptr inbounds i8, ptr %X.sroa.0.i, i32 4
call void @llvm.memcpy.p0.p0.i32(ptr %X.sroa.0.4.raw_idx4.i, ptr %d, i32 4, i1 false)
; Store to the high 32-bits...
@@ -1146,7 +1139,7 @@ entry:
%accum.real.i = load double, ptr %d, align 8
%add.r.i = fadd double %accum.real.i, %X.sroa.0.0.load1.i
store double %add.r.i, ptr %d, align 8
- call void @llvm.lifetime.end.p0(i64 -1, ptr %0)
+ call void @llvm.lifetime.end.p0(i64 -1, ptr %X.sroa.0.i)
ret void
}
@@ -1176,8 +1169,7 @@ define i64 @PR14059.2(ptr %phi) {
entry:
%retval = alloca { float, float }, align 4
- %0 = bitcast ptr %retval to ptr
- store i64 0, ptr %0
+ store i64 0, ptr %retval
%phi.realp = getelementptr inbounds { float, float }, ptr %phi, i32 0, i32 0
%phi.real = load float, ptr %phi.realp
@@ -1189,8 +1181,8 @@ entry:
store float %phi.real, ptr %real
store float %phi.imag, ptr %imag
- %1 = load i64, ptr %0, align 1
- ret i64 %1
+ %0 = load i64, ptr %retval, align 1
+ ret i64 %0
}
define void @PR14105(ptr %ptr) {
@@ -1781,11 +1773,10 @@ entry:
define void @PR25873(ptr %outData) {
; CHECK-LABEL: @PR25873(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = bitcast ptr [[OUTDATA:%.*]] to ptr
-; CHECK-NEXT: store i32 1123418112, ptr [[TMP0]], align 4
-; CHECK-NEXT: [[DOTSROA_IDX:%.*]] = getelementptr inbounds i8, ptr [[TMP0]], i64 4
+; CHECK-NEXT: store i32 1123418112, ptr [[OUTDATA:%.*]], align 4
+; CHECK-NEXT: [[DOTSROA_IDX:%.*]] = getelementptr inbounds i8, ptr [[OUTDATA:%.*]], i64 4
; CHECK-NEXT: store i32 1139015680, ptr [[DOTSROA_IDX]], align 4
-; CHECK-NEXT: [[TMPDATA_SROA_6_0__SROA_IDX:%.*]] = getelementptr inbounds i8, ptr [[TMP0]], i64 8
+; CHECK-NEXT: [[TMPDATA_SROA_6_0__SROA_IDX:%.*]] = getelementptr inbounds i8, ptr [[OUTDATA:%.*]], i64 8
; CHECK-NEXT: [[TMPDATA_SROA_6_SROA_4_0_INSERT_EXT:%.*]] = zext i32 1139015680 to i64
; CHECK-NEXT: [[TMPDATA_SROA_6_SROA_4_0_INSERT_SHIFT:%.*]] = shl i64 [[TMPDATA_SROA_6_SROA_4_0_INSERT_EXT]], 32
; CHECK-NEXT: [[TMPDATA_SROA_6_SROA_4_0_INSERT_MASK:%.*]] = and i64 undef, 4294967295
@@ -1798,19 +1789,15 @@ define void @PR25873(ptr %outData) {
;
entry:
%tmpData = alloca %struct.STest, align 8
- %0 = bitcast ptr %tmpData to ptr
- call void @llvm.lifetime.start.p0(i64 16, ptr %0)
+ call void @llvm.lifetime.start.p0(i64 16, ptr %tmpData)
store float 1.230000e+02, ptr %tmpData, align 8
%y = getelementptr inbounds %struct.STest, ptr %tmpData, i64 0, i32 0, i32 1
store float 4.560000e+02, ptr %y, align 4
%m_posB = getelementptr inbounds %struct.STest, ptr %tmpData, i64 0, i32 1
- %1 = bitcast ptr %tmpData to ptr
- %2 = bitcast ptr %m_posB to ptr
- %3 = load i64, ptr %1, align 8
- store i64 %3, ptr %2, align 8
- %4 = bitcast ptr %outData to ptr
- call void @llvm.memcpy.p0.p0.i64(ptr align 4 %4, ptr align 4 %0, i64 16, i1 false)
- call void @llvm.lifetime.end.p0(i64 16, ptr %0)
+ %0 = load i64, ptr %tmpData, align 8
+ store i64 %0, ptr %m_posB, align 8
+ call void @llvm.memcpy.p0.p0.i64(ptr align 4 %outData, ptr align 4 %tmpData, i64 16, i1 false)
+ call void @llvm.lifetime.end.p0(i64 16, ptr %tmpData)
ret void
}
@@ -1823,11 +1810,9 @@ define void @PR27999() unnamed_addr {
;
entry-block:
%0 = alloca [2 x i64], align 8
- %1 = bitcast ptr %0 to ptr
- call void @llvm.lifetime.start.p0(i64 16, ptr %1)
- %2 = getelementptr inbounds [2 x i64], ptr %0, i32 0, i32 1
- %3 = bitcast ptr %2 to ptr
- call void @llvm.lifetime.end.p0(i64 8, ptr %3)
+ call void @llvm.lifetime.start.p0(i64 16, ptr %0)
+ %1 = getelementptr inbounds [2 x i64], ptr %0, i32 0, i32 1
+ call void @llvm.lifetime.end.p0(i64 8, ptr %1)
ret void
}
@@ -1839,8 +1824,7 @@ define void @PR29139() {
bb1:
%e.7.sroa.6.i = alloca i32, align 1
%e.7.sroa.6.0.load81.i = load i32, ptr %e.7.sroa.6.i, align 1
- %0 = bitcast ptr %e.7.sroa.6.i to ptr
- call void @llvm.lifetime.end.p0(i64 2, ptr %0)
+ call void @llvm.lifetime.end.p0(i64 2, ptr %e.7.sroa.6.i)
ret void
}
@@ -1884,12 +1868,11 @@ entry:
%t = alloca { i64, i32, i32 }
%b = getelementptr { i64, i32, i32 }, ptr %t, i32 0, i32 1
- %0 = bitcast ptr %b to ptr
- store i64 %v, ptr %0
+ store i64 %v, ptr %b
- %1 = load i32, ptr %b
+ %0 = load i32, ptr %b
%c = getelementptr { i64, i32, i32 }, ptr %t, i32 0, i32 2
- store i32 %1, ptr %c
+ store i32 %0, ptr %c
ret void
}
@@ -1906,7 +1889,6 @@ define void @test29(i32 %num, i32 %tid) {
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[TID:%.*]], 0
; CHECK-NEXT: [[CONV_I:%.*]] = zext i32 [[TID]] to i64
; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [10 x float], ptr @array, i64 0, i64 [[CONV_I]]
-; CHECK-NEXT: [[TMP0:%.*]] = bitcast ptr [[ARRAYIDX5]] to ptr
; CHECK-NEXT: br label [[BB2:%.*]]
; CHECK: bb2:
; CHECK-NEXT: [[I_02:%.*]] = phi i32 [ [[NUM]], [[BB1]] ], [ [[SUB:%.*]], [[BB5:%.*]] ]
@@ -1914,7 +1896,7 @@ define void @test29(i32 %num, i32 %tid) {
; CHECK: bb3:
; CHECK-NEXT: br label [[BB5]]
; CHECK: bb4:
-; CHECK-NEXT: store i32 undef, ptr [[TMP0]], align 4
+; CHECK-NEXT: store i32 undef, ptr [[ARRAYIDX5]], align 4
; CHECK-NEXT: br label [[BB5]]
; CHECK: bb5:
; CHECK-NEXT: [[SUB]] = add i32 [[I_02]], -1
@@ -1936,10 +1918,8 @@ entry:
bb1:
%tobool = icmp eq i32 %tid, 0
%conv.i = zext i32 %tid to i64
- %0 = bitcast ptr %ra to ptr
- %1 = load i32, ptr %0, align 4
+ %0 = load i32, ptr %ra, align 4
%arrayidx5 = getelementptr inbounds [10 x float], ptr @array, i64 0, i64 %conv.i
- %2 = bitcast ptr %arrayidx5 to ptr
br label %bb2
bb2:
@@ -1950,7 +1930,7 @@ bb3:
br label %bb5
bb4:
- store i32 %1, ptr %2, align 4
+ store i32 %0, ptr %arrayidx5, align 4
br label %bb5
bb5:
diff --git a/llvm/test/Transforms/SROA/dbg-addr-diamond.ll b/llvm/test/Transforms/SROA/dbg-addr-diamond.ll
index 8fa14c6d10199..7d75b90d756fe 100644
--- a/llvm/test/Transforms/SROA/dbg-addr-diamond.ll
+++ b/llvm/test/Transforms/SROA/dbg-addr-diamond.ll
@@ -13,7 +13,6 @@ target triple = "x86_64-pc-windows-msvc19.0.24215"
define void @if_else(i32 %cond, i32 %a, i32 %b) !dbg !8 {
entry:
%p = alloca %struct.Pair, align 4
- %0 = bitcast ptr %p to ptr, !dbg !25
call void @llvm.dbg.addr(metadata ptr %p, metadata !20, metadata !DIExpression()), !dbg !26
store i32 %a, ptr %p, align 4, !dbg !28
%y = getelementptr inbounds %struct.Pair, ptr %p, i32 0, i32 1, !dbg !34
@@ -34,9 +33,7 @@ if.else: ; preds = %entry
br label %if.end
if.end: ; preds = %if.else, %if.then
- %1 = bitcast ptr %p to ptr, !dbg !51
- %2 = bitcast ptr @pair to ptr, !dbg !51
- call void @llvm.memcpy.p0.p0.i64(ptr align 4 %2, ptr align 4 %1, i64 8, i1 false), !dbg !51
+ call void @llvm.memcpy.p0.p0.i64(ptr align 4 @pair, ptr align 4 %p, i64 8, i1 false), !dbg !51
ret void
}
diff --git a/llvm/test/Transforms/SROA/dbg-inline.ll b/llvm/test/Transforms/SROA/dbg-inline.ll
index 57880ff4afb52..883fe28cf8930 100644
--- a/llvm/test/Transforms/SROA/dbg-inline.ll
+++ b/llvm/test/Transforms/SROA/dbg-inline.ll
@@ -12,17 +12,16 @@ target triple = "x86_64-apple-macosx10.15.0"
define i64 @_Z1g4pair(i64 %p.coerce0, i64 %p.coerce1) #0 !dbg !8 {
entry:
%p = alloca %struct.pair, align 8
- %0 = getelementptr inbounds %struct.pair, ptr %p, i32 0, i32 0
- store i64 %p.coerce0, ptr %0, align 8
- %1 = getelementptr inbounds %struct.pair, ptr %p, i32 0, i32 1
- store i64 %p.coerce1, ptr %1, align 8
+ store i64 %p.coerce0, ptr %p, align 8
+ %0 = getelementptr inbounds %struct.pair, ptr %p, i32 0, i32 1
+ store i64 %p.coerce1, ptr %0, align 8
; CHECK-DAG: call void @llvm.dbg.value(metadata i64 %p.coerce0, metadata ![[VAR:[0-9]+]], metadata !DIExpression(DW_OP_LLVM_fragment, 0, 64)), !dbg ![[LOC:[0-9]+]]
; CHECK-DAG: call void @llvm.dbg.value(metadata i64 %p.coerce1, metadata ![[VAR]], metadata !DIExpression(DW_OP_LLVM_fragment, 64, 64)), !dbg ![[LOC]]
; CHECK-DAG: call void @llvm.dbg.value(metadata i64 %p.coerce0, metadata ![[INLINED_VAR:[0-9]+]], metadata !DIExpression(DW_OP_LLVM_fragment, 0, 64)), !dbg ![[INLINED_LOC:[0-9]+]]
; CHECK-DAG: call void @llvm.dbg.value(metadata i64 %p.coerce1, metadata ![[INLINED_VAR]], metadata !DIExpression(DW_OP_LLVM_fragment, 64, 64)), !dbg ![[INLINED_LOC]]
call void @llvm.dbg.declare(metadata ptr %p, metadata !17, metadata !DIExpression()), !dbg !18
call void @llvm.dbg.declare(metadata ptr %p, metadata !21, metadata !DIExpression()), !dbg !23
- %x2 = load i64, ptr %0, align 8, !dbg !25
+ %x2 = load i64, ptr %p, align 8, !dbg !25
ret i64 %x2, !dbg !26
}
diff --git a/llvm/test/Transforms/SROA/dbg-single-piece.ll b/llvm/test/Transforms/SROA/dbg-single-piece.ll
index 7e34b300a4afe..bb0e51de8f1ae 100644
--- a/llvm/test/Transforms/SROA/dbg-single-piece.ll
+++ b/llvm/test/Transforms/SROA/dbg-single-piece.ll
@@ -16,10 +16,8 @@ entry:
call void @llvm.dbg.declare(metadata ptr %retval, metadata !1, metadata !7), !dbg !8
; Checks that SROA still inserts a bit_piece expression, even if it produces only one piece
; (as long as that piece is smaller than the whole thing)
- %0 = bitcast ptr %retval to ptr
- %1 = getelementptr inbounds i8, ptr %0, i64 8
- %2 = bitcast ptr %1 to ptr
- store ptr poison, ptr %2, align 8
+ %0 = getelementptr inbounds i8, ptr %retval, i64 8
+ store ptr poison, ptr %0, align 8
ret void
}
diff --git a/llvm/test/Transforms/SROA/dead-inst.ll b/llvm/test/Transforms/SROA/dead-inst.ll
index 97e6995588b0a..a685123fa34c2 100644
--- a/llvm/test/Transforms/SROA/dead-inst.ll
+++ b/llvm/test/Transforms/SROA/dead-inst.ll
@@ -59,15 +59,14 @@ a.exit:
%22 = phi i64 [ -1, %12 ], [ %21, %18 ]
%23 = load ptr, ptr %13, align 8
%24 = sub nsw i64 %22, %14
- %25 = bitcast ptr %3 to ptr
- call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %25)
- %26 = icmp ult i64 %24, 2
- br i1 %26, label %G.exit, label %27
+ call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %3)
+ %25 = icmp ult i64 %24, 2
+ br i1 %25, label %G.exit, label %26
; <label>:27:
- %28 = getelementptr inbounds i8, ptr %23, i64 %idx
- %29 = icmp eq ptr %28, null
- br i1 %29, label %30, label %31
+ %27 = getelementptr inbounds i8, ptr %23, i64 %idx
+ %28 = icmp eq ptr %27, null
+ br i1 %28, label %29, label %30
; <label>:30:
unreachable
@@ -77,7 +76,7 @@ a.exit:
br label %G.exit
G.exit:
- call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %25)
+ call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %3)
br label %foo
foo:
diff --git a/llvm/test/Transforms/SROA/irregular-type.ll b/llvm/test/Transforms/SROA/irregular-type.ll
index d32ff51aec13c..78cd6b3f6b1c3 100644
--- a/llvm/test/Transforms/SROA/irregular-type.ll
+++ b/llvm/test/Transforms/SROA/irregular-type.ll
@@ -17,11 +17,10 @@ define i8 @foo(i23 %0) {
;
Entry:
%1 = alloca %S
- %2 = bitcast ptr %1 to ptr
- store i23 %0, ptr %2
- %3 = getelementptr inbounds %S, ptr %1, i64 0, i32 0, i32 1
- %4 = load i8, ptr %3
- ret i8 %4
+ store i23 %0, ptr %1
+ %2 = getelementptr inbounds %S, ptr %1, i64 0, i32 0, i32 1
+ %3 = load i8, ptr %2
+ ret i8 %3
}
define i32 @bar(i16 %0) {
@@ -35,10 +34,8 @@ define i32 @bar(i16 %0) {
;
Entry:
%1 = alloca %S
- %2 = bitcast ptr %1 to ptr
- store i16 %0, ptr %2
- %3 = getelementptr inbounds %S, ptr %1, i64 0, i32 0
- %4 = load i17, ptr %3
- %5 = zext i17 %4 to i32
- ret i32 %5
+ store i16 %0, ptr %1
+ %2 = load i17, ptr %1
+ %3 = zext i17 %2 to i32
+ ret i32 %3
}
diff --git a/llvm/test/Transforms/SROA/mem-par-metadata-sroa.ll b/llvm/test/Transforms/SROA/mem-par-metadata-sroa.ll
index 872aa89e48aa8..57d36739a609c 100644
--- a/llvm/test/Transforms/SROA/mem-par-metadata-sroa.ll
+++ b/llvm/test/Transforms/SROA/mem-par-metadata-sroa.ll
@@ -78,9 +78,8 @@ for.body: ; preds = %for.cond
store float %add.i, ptr %ref.tmp, align 4, !alias.scope !3, !llvm.access.group !11
%imaginary_.i.i4 = getelementptr inbounds %class.Complex, ptr %ref.tmp, i64 0, i32 1
store float %add4.i, ptr %imaginary_.i.i4, align 4, !alias.scope !3, !llvm.access.group !11
- %6 = bitcast ptr %arrayidx1 to ptr
- %7 = load i64, ptr %ref.tmp, align 8, !llvm.access.group !11
- store i64 %7, ptr %6, align 4, !llvm.access.group !11
+ %6 = load i64, ptr %ref.tmp, align 8, !llvm.access.group !11
+ store i64 %6, ptr %arrayidx1, align 4, !llvm.access.group !11
%inc = add nsw i64 %offset.0, 1
br label %for.cond, !llvm.loop !1
diff --git a/llvm/test/Transforms/SROA/non-capturing-call-readonly.ll b/llvm/test/Transforms/SROA/non-capturing-call-readonly.ll
index a184399febb8f..229c4730e26c6 100644
--- a/llvm/test/Transforms/SROA/non-capturing-call-readonly.ll
+++ b/llvm/test/Transforms/SROA/non-capturing-call-readonly.ll
@@ -1,6 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -passes=sroa -S | FileCheck %s --check-prefix=CHECK
-; RUN: opt < %s -passes=sroa -opaque-pointers -S | FileCheck %s --check-prefix=CHECK-OPAQUE
define i32 @alloca_used_in_call(ptr %data, i64 %n) {
; CHECK-LABEL: @alloca_used_in_call(
@@ -22,27 +21,6 @@ define i32 @alloca_used_in_call(ptr %data, i64 %n) {
; CHECK-NEXT: [[I0:%.*]] = call i32 @user_of_alloca(ptr [[RETVAL]])
; CHECK-NEXT: [[I1:%.*]] = load i32, ptr [[RETVAL]], align 4
; CHECK-NEXT: ret i32 [[I1]]
-;
-; CHECK-OPAQUE-LABEL: @alloca_used_in_call(
-; CHECK-OPAQUE-NEXT: entry:
-; CHECK-OPAQUE-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
-; CHECK-OPAQUE-NEXT: store i32 0, ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: br label [[LOOP:%.*]]
-; CHECK-OPAQUE: loop:
-; CHECK-OPAQUE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-OPAQUE-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[DATA:%.*]], i64 [[INDVARS_IV]]
-; CHECK-OPAQUE-NEXT: [[LD:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
-; CHECK-OPAQUE-NEXT: [[RDX:%.*]] = load i32, ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: [[RDX_INC:%.*]] = add nsw i32 [[RDX]], [[LD]]
-; CHECK-OPAQUE-NEXT: store i32 [[RDX_INC]], ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
-; CHECK-OPAQUE-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
-; CHECK-OPAQUE-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]]
-; CHECK-OPAQUE: exit:
-; CHECK-OPAQUE-NEXT: [[I0:%.*]] = call i32 @user_of_alloca(ptr [[RETVAL]])
-; CHECK-OPAQUE-NEXT: [[I1:%.*]] = load i32, ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: ret i32 [[I1]]
-;
entry:
%retval = alloca i32, align 4
store i32 0, ptr %retval, align 4
@@ -85,27 +63,6 @@ define i32 @alloca_captured_in_call(ptr %data, i64 %n) {
; CHECK-NEXT: [[I0:%.*]] = call i32 @capture_of_alloca(ptr [[RETVAL]])
; CHECK-NEXT: [[I1:%.*]] = load i32, ptr [[RETVAL]], align 4
; CHECK-NEXT: ret i32 [[I1]]
-;
-; CHECK-OPAQUE-LABEL: @alloca_captured_in_call(
-; CHECK-OPAQUE-NEXT: entry:
-; CHECK-OPAQUE-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
-; CHECK-OPAQUE-NEXT: store i32 0, ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: br label [[LOOP:%.*]]
-; CHECK-OPAQUE: loop:
-; CHECK-OPAQUE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-OPAQUE-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[DATA:%.*]], i64 [[INDVARS_IV]]
-; CHECK-OPAQUE-NEXT: [[LD:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
-; CHECK-OPAQUE-NEXT: [[RDX:%.*]] = load i32, ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: [[RDX_INC:%.*]] = add nsw i32 [[RDX]], [[LD]]
-; CHECK-OPAQUE-NEXT: store i32 [[RDX_INC]], ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
-; CHECK-OPAQUE-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
-; CHECK-OPAQUE-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]]
-; CHECK-OPAQUE: exit:
-; CHECK-OPAQUE-NEXT: [[I0:%.*]] = call i32 @capture_of_alloca(ptr [[RETVAL]])
-; CHECK-OPAQUE-NEXT: [[I1:%.*]] = load i32, ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: ret i32 [[I1]]
-;
entry:
%retval = alloca i32, align 4
store i32 0, ptr %retval, align 4
@@ -148,27 +105,6 @@ define i32 @alloca_not_captured_as_per_operand_attr(ptr %data, i64 %n) {
; CHECK-NEXT: [[I0:%.*]] = call i32 @capture_of_alloca(ptr nocapture [[RETVAL]])
; CHECK-NEXT: [[I1:%.*]] = load i32, ptr [[RETVAL]], align 4
; CHECK-NEXT: ret i32 [[I1]]
-;
-; CHECK-OPAQUE-LABEL: @alloca_not_captured_as_per_operand_attr(
-; CHECK-OPAQUE-NEXT: entry:
-; CHECK-OPAQUE-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
-; CHECK-OPAQUE-NEXT: store i32 0, ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: br label [[LOOP:%.*]]
-; CHECK-OPAQUE: loop:
-; CHECK-OPAQUE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-OPAQUE-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[DATA:%.*]], i64 [[INDVARS_IV]]
-; CHECK-OPAQUE-NEXT: [[LD:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
-; CHECK-OPAQUE-NEXT: [[RDX:%.*]] = load i32, ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: [[RDX_INC:%.*]] = add nsw i32 [[RDX]], [[LD]]
-; CHECK-OPAQUE-NEXT: store i32 [[RDX_INC]], ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
-; CHECK-OPAQUE-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
-; CHECK-OPAQUE-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]]
-; CHECK-OPAQUE: exit:
-; CHECK-OPAQUE-NEXT: [[I0:%.*]] = call i32 @capture_of_alloca(ptr nocapture [[RETVAL]])
-; CHECK-OPAQUE-NEXT: [[I1:%.*]] = load i32, ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: ret i32 [[I1]]
-;
entry:
%retval = alloca i32, align 4
store i32 0, ptr %retval, align 4
@@ -211,27 +147,6 @@ define i32 @alloca_not_captured_and_readonly_as_per_operand_attr(ptr %data, i64
; CHECK-NEXT: [[I0:%.*]] = call i32 @capture_of_alloca(ptr nocapture readonly [[RETVAL]])
; CHECK-NEXT: [[I1:%.*]] = load i32, ptr [[RETVAL]], align 4
; CHECK-NEXT: ret i32 [[I1]]
-;
-; CHECK-OPAQUE-LABEL: @alloca_not_captured_and_readonly_as_per_operand_attr(
-; CHECK-OPAQUE-NEXT: entry:
-; CHECK-OPAQUE-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
-; CHECK-OPAQUE-NEXT: store i32 0, ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: br label [[LOOP:%.*]]
-; CHECK-OPAQUE: loop:
-; CHECK-OPAQUE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-OPAQUE-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[DATA:%.*]], i64 [[INDVARS_IV]]
-; CHECK-OPAQUE-NEXT: [[LD:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
-; CHECK-OPAQUE-NEXT: [[RDX:%.*]] = load i32, ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: [[RDX_INC:%.*]] = add nsw i32 [[RDX]], [[LD]]
-; CHECK-OPAQUE-NEXT: store i32 [[RDX_INC]], ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
-; CHECK-OPAQUE-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
-; CHECK-OPAQUE-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]]
-; CHECK-OPAQUE: exit:
-; CHECK-OPAQUE-NEXT: [[I0:%.*]] = call i32 @capture_of_alloca(ptr nocapture readonly [[RETVAL]])
-; CHECK-OPAQUE-NEXT: [[I1:%.*]] = load i32, ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: ret i32 [[I1]]
-;
entry:
%retval = alloca i32, align 4
store i32 0, ptr %retval, align 4
@@ -274,27 +189,6 @@ define i32 @alloca_not_captured_as_per_operand_attr_and_readonly_as_per_callbase
; CHECK-NEXT: [[I0:%.*]] = call i32 @capture_of_alloca(ptr nocapture [[RETVAL]]) #[[ATTR2:[0-9]+]]
; CHECK-NEXT: [[I1:%.*]] = load i32, ptr [[RETVAL]], align 4
; CHECK-NEXT: ret i32 [[I1]]
-;
-; CHECK-OPAQUE-LABEL: @alloca_not_captured_as_per_operand_attr_and_readonly_as_per_callbase_attr(
-; CHECK-OPAQUE-NEXT: entry:
-; CHECK-OPAQUE-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
-; CHECK-OPAQUE-NEXT: store i32 0, ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: br label [[LOOP:%.*]]
-; CHECK-OPAQUE: loop:
-; CHECK-OPAQUE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-OPAQUE-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[DATA:%.*]], i64 [[INDVARS_IV]]
-; CHECK-OPAQUE-NEXT: [[LD:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
-; CHECK-OPAQUE-NEXT: [[RDX:%.*]] = load i32, ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: [[RDX_INC:%.*]] = add nsw i32 [[RDX]], [[LD]]
-; CHECK-OPAQUE-NEXT: store i32 [[RDX_INC]], ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
-; CHECK-OPAQUE-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
-; CHECK-OPAQUE-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]]
-; CHECK-OPAQUE: exit:
-; CHECK-OPAQUE-NEXT: [[I0:%.*]] = call i32 @capture_of_alloca(ptr nocapture [[RETVAL]]) #[[ATTR2:[0-9]+]]
-; CHECK-OPAQUE-NEXT: [[I1:%.*]] = load i32, ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: ret i32 [[I1]]
-;
entry:
%retval = alloca i32, align 4
store i32 0, ptr %retval, align 4
@@ -337,27 +231,6 @@ define i32 @alloca_not_readonly_as_per_operand_attr(ptr %data, i64 %n) {
; CHECK-NEXT: [[I0:%.*]] = call i32 @capture_of_alloca(ptr readonly [[RETVAL]])
; CHECK-NEXT: [[I1:%.*]] = load i32, ptr [[RETVAL]], align 4
; CHECK-NEXT: ret i32 [[I1]]
-;
-; CHECK-OPAQUE-LABEL: @alloca_not_readonly_as_per_operand_attr(
-; CHECK-OPAQUE-NEXT: entry:
-; CHECK-OPAQUE-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
-; CHECK-OPAQUE-NEXT: store i32 0, ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: br label [[LOOP:%.*]]
-; CHECK-OPAQUE: loop:
-; CHECK-OPAQUE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-OPAQUE-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[DATA:%.*]], i64 [[INDVARS_IV]]
-; CHECK-OPAQUE-NEXT: [[LD:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
-; CHECK-OPAQUE-NEXT: [[RDX:%.*]] = load i32, ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: [[RDX_INC:%.*]] = add nsw i32 [[RDX]], [[LD]]
-; CHECK-OPAQUE-NEXT: store i32 [[RDX_INC]], ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
-; CHECK-OPAQUE-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
-; CHECK-OPAQUE-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]]
-; CHECK-OPAQUE: exit:
-; CHECK-OPAQUE-NEXT: [[I0:%.*]] = call i32 @capture_of_alloca(ptr readonly [[RETVAL]])
-; CHECK-OPAQUE-NEXT: [[I1:%.*]] = load i32, ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: ret i32 [[I1]]
-;
entry:
%retval = alloca i32, align 4
store i32 0, ptr %retval, align 4
@@ -400,27 +273,6 @@ define i32 @alloca_with_gep_used_in_call(ptr %data, i64 %n) {
; CHECK-NEXT: [[I0:%.*]] = call i32 @user_of_alloca(ptr [[RETVAL]])
; CHECK-NEXT: [[I1:%.*]] = load i32, ptr [[RETVAL]], align 4
; CHECK-NEXT: ret i32 [[I1]]
-;
-; CHECK-OPAQUE-LABEL: @alloca_with_gep_used_in_call(
-; CHECK-OPAQUE-NEXT: entry:
-; CHECK-OPAQUE-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
-; CHECK-OPAQUE-NEXT: store i32 0, ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: br label [[LOOP:%.*]]
-; CHECK-OPAQUE: loop:
-; CHECK-OPAQUE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-OPAQUE-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[DATA:%.*]], i64 [[INDVARS_IV]]
-; CHECK-OPAQUE-NEXT: [[LD:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
-; CHECK-OPAQUE-NEXT: [[RDX:%.*]] = load i32, ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: [[RDX_INC:%.*]] = add nsw i32 [[RDX]], [[LD]]
-; CHECK-OPAQUE-NEXT: store i32 [[RDX_INC]], ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
-; CHECK-OPAQUE-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
-; CHECK-OPAQUE-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]]
-; CHECK-OPAQUE: exit:
-; CHECK-OPAQUE-NEXT: [[I0:%.*]] = call i32 @user_of_alloca(ptr [[RETVAL]])
-; CHECK-OPAQUE-NEXT: [[I1:%.*]] = load i32, ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: ret i32 [[I1]]
-;
entry:
%retval = alloca i32, align 4
store i32 0, ptr %retval, align 4
@@ -463,27 +315,6 @@ define i32 @alloca_captured_second_arg(ptr %data, i64 %n) {
; CHECK-NEXT: [[I0:%.*]] = call i32 @capture_with_multiple_args(ptr [[RETVAL]], ptr [[RETVAL]])
; CHECK-NEXT: [[I1:%.*]] = load i32, ptr [[RETVAL]], align 4
; CHECK-NEXT: ret i32 [[I1]]
-;
-; CHECK-OPAQUE-LABEL: @alloca_captured_second_arg(
-; CHECK-OPAQUE-NEXT: entry:
-; CHECK-OPAQUE-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
-; CHECK-OPAQUE-NEXT: store i32 0, ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: br label [[LOOP:%.*]]
-; CHECK-OPAQUE: loop:
-; CHECK-OPAQUE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-OPAQUE-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[DATA:%.*]], i64 [[INDVARS_IV]]
-; CHECK-OPAQUE-NEXT: [[LD:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
-; CHECK-OPAQUE-NEXT: [[RDX:%.*]] = load i32, ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: [[RDX_INC:%.*]] = add nsw i32 [[RDX]], [[LD]]
-; CHECK-OPAQUE-NEXT: store i32 [[RDX_INC]], ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
-; CHECK-OPAQUE-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
-; CHECK-OPAQUE-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]]
-; CHECK-OPAQUE: exit:
-; CHECK-OPAQUE-NEXT: [[I0:%.*]] = call i32 @capture_with_multiple_args(ptr [[RETVAL]], ptr [[RETVAL]])
-; CHECK-OPAQUE-NEXT: [[I1:%.*]] = load i32, ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: ret i32 [[I1]]
-;
entry:
%retval = alloca i32, align 4
store i32 0, ptr %retval, align 4
@@ -534,35 +365,6 @@ define i32 @alloca_used_in_maybe_throwing_call(ptr %data, i64 %n) personality pt
; CHECK: end:
; CHECK-NEXT: [[I2:%.*]] = load i32, ptr [[RETVAL]], align 4
; CHECK-NEXT: ret i32 [[I2]]
-;
-; CHECK-OPAQUE-LABEL: @alloca_used_in_maybe_throwing_call(
-; CHECK-OPAQUE-NEXT: entry:
-; CHECK-OPAQUE-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
-; CHECK-OPAQUE-NEXT: store i32 0, ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: br label [[LOOP:%.*]]
-; CHECK-OPAQUE: loop:
-; CHECK-OPAQUE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-OPAQUE-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[DATA:%.*]], i64 [[INDVARS_IV]]
-; CHECK-OPAQUE-NEXT: [[LD:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
-; CHECK-OPAQUE-NEXT: [[RDX:%.*]] = load i32, ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: [[RDX_INC:%.*]] = add nsw i32 [[RDX]], [[LD]]
-; CHECK-OPAQUE-NEXT: store i32 [[RDX_INC]], ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
-; CHECK-OPAQUE-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
-; CHECK-OPAQUE-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]]
-; CHECK-OPAQUE: exit:
-; CHECK-OPAQUE-NEXT: [[I0:%.*]] = invoke i32 @user_of_alloca(ptr [[RETVAL]])
-; CHECK-OPAQUE-NEXT: to label [[CONT:%.*]] unwind label [[UW:%.*]]
-; CHECK-OPAQUE: cont:
-; CHECK-OPAQUE-NEXT: br label [[END:%.*]]
-; CHECK-OPAQUE: uw:
-; CHECK-OPAQUE-NEXT: [[I1:%.*]] = landingpad { ptr, i32 }
-; CHECK-OPAQUE-NEXT: catch ptr null
-; CHECK-OPAQUE-NEXT: br label [[END]]
-; CHECK-OPAQUE: end:
-; CHECK-OPAQUE-NEXT: [[I2:%.*]] = load i32, ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: ret i32 [[I2]]
-;
entry:
%retval = alloca i32, align 4
store i32 0, ptr %retval, align 4
@@ -620,33 +422,6 @@ define i32 @alloca_used_in_maybe_throwing_call_with_same_dests(ptr %data, i64 %n
; CHECK: end:
; CHECK-NEXT: [[I2:%.*]] = load i32, ptr [[RETVAL]], align 4
; CHECK-NEXT: ret i32 [[I2]]
-;
-; CHECK-OPAQUE-LABEL: @alloca_used_in_maybe_throwing_call_with_same_dests(
-; CHECK-OPAQUE-NEXT: entry:
-; CHECK-OPAQUE-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
-; CHECK-OPAQUE-NEXT: store i32 0, ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: br label [[LOOP:%.*]]
-; CHECK-OPAQUE: loop:
-; CHECK-OPAQUE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-OPAQUE-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[DATA:%.*]], i64 [[INDVARS_IV]]
-; CHECK-OPAQUE-NEXT: [[LD:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
-; CHECK-OPAQUE-NEXT: [[RDX:%.*]] = load i32, ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: [[RDX_INC:%.*]] = add nsw i32 [[RDX]], [[LD]]
-; CHECK-OPAQUE-NEXT: store i32 [[RDX_INC]], ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
-; CHECK-OPAQUE-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
-; CHECK-OPAQUE-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]]
-; CHECK-OPAQUE: exit:
-; CHECK-OPAQUE-NEXT: [[I0:%.*]] = invoke i32 @user_of_alloca(ptr [[RETVAL]])
-; CHECK-OPAQUE-NEXT: to label [[END:%.*]] unwind label [[UW:%.*]]
-; CHECK-OPAQUE: uw:
-; CHECK-OPAQUE-NEXT: [[I1:%.*]] = landingpad { ptr, i32 }
-; CHECK-OPAQUE-NEXT: catch ptr null
-; CHECK-OPAQUE-NEXT: br label [[END]]
-; CHECK-OPAQUE: end:
-; CHECK-OPAQUE-NEXT: [[I2:%.*]] = load i32, ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: ret i32 [[I2]]
-;
entry:
%retval = alloca i32, align 4
store i32 0, ptr %retval, align 4
@@ -704,36 +479,6 @@ define [2 x i32] @part_of_alloca_used_in_call(ptr %data, i64 %n) {
; CHECK-NEXT: [[I1_FCA_1_LOAD:%.*]] = load i32, ptr [[I1_FCA_1_GEP]], align 4
; CHECK-NEXT: [[I1_FCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[I1_FCA_0_INSERT]], i32 [[I1_FCA_1_LOAD]], 1
; CHECK-NEXT: ret [2 x i32] [[I1_FCA_1_INSERT]]
-;
-; CHECK-OPAQUE-LABEL: @part_of_alloca_used_in_call(
-; CHECK-OPAQUE-NEXT: entry:
-; CHECK-OPAQUE-NEXT: [[RETVAL_FULL:%.*]] = alloca [2 x i32], align 4
-; CHECK-OPAQUE-NEXT: [[DOTFCA_0_GEP:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i32 0, i32 0
-; CHECK-OPAQUE-NEXT: store i32 0, ptr [[DOTFCA_0_GEP]], align 4
-; CHECK-OPAQUE-NEXT: [[DOTFCA_1_GEP:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i32 0, i32 1
-; CHECK-OPAQUE-NEXT: store i32 0, ptr [[DOTFCA_1_GEP]], align 4
-; CHECK-OPAQUE-NEXT: [[RETVAL:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i64 0, i64 1
-; CHECK-OPAQUE-NEXT: br label [[LOOP:%.*]]
-; CHECK-OPAQUE: loop:
-; CHECK-OPAQUE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-OPAQUE-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[DATA:%.*]], i64 [[INDVARS_IV]]
-; CHECK-OPAQUE-NEXT: [[LD:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
-; CHECK-OPAQUE-NEXT: [[RDX:%.*]] = load i32, ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: [[RDX_INC:%.*]] = add nsw i32 [[RDX]], [[LD]]
-; CHECK-OPAQUE-NEXT: store i32 [[RDX_INC]], ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
-; CHECK-OPAQUE-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
-; CHECK-OPAQUE-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]]
-; CHECK-OPAQUE: exit:
-; CHECK-OPAQUE-NEXT: [[I0:%.*]] = call i32 @user_of_alloca(ptr [[RETVAL]])
-; CHECK-OPAQUE-NEXT: [[I1_FCA_0_GEP:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i32 0, i32 0
-; CHECK-OPAQUE-NEXT: [[I1_FCA_0_LOAD:%.*]] = load i32, ptr [[I1_FCA_0_GEP]], align 4
-; CHECK-OPAQUE-NEXT: [[I1_FCA_0_INSERT:%.*]] = insertvalue [2 x i32] poison, i32 [[I1_FCA_0_LOAD]], 0
-; CHECK-OPAQUE-NEXT: [[I1_FCA_1_GEP:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i32 0, i32 1
-; CHECK-OPAQUE-NEXT: [[I1_FCA_1_LOAD:%.*]] = load i32, ptr [[I1_FCA_1_GEP]], align 4
-; CHECK-OPAQUE-NEXT: [[I1_FCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[I1_FCA_0_INSERT]], i32 [[I1_FCA_1_LOAD]], 1
-; CHECK-OPAQUE-NEXT: ret [2 x i32] [[I1_FCA_1_INSERT]]
-;
entry:
%retval.full = alloca [2 x i32], align 4
store [2 x i32] zeroinitializer, ptr %retval.full, align 4
@@ -786,36 +531,6 @@ define [2 x i32] @all_parts_of_alloca_used_in_call_with_multiple_args(ptr %data,
; CHECK-NEXT: [[I1_FCA_1_LOAD:%.*]] = load i32, ptr [[I1_FCA_1_GEP]], align 4
; CHECK-NEXT: [[I1_FCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[I1_FCA_0_INSERT]], i32 [[I1_FCA_1_LOAD]], 1
; CHECK-NEXT: ret [2 x i32] [[I1_FCA_1_INSERT]]
-;
-; CHECK-OPAQUE-LABEL: @all_parts_of_alloca_used_in_call_with_multiple_args(
-; CHECK-OPAQUE-NEXT: entry:
-; CHECK-OPAQUE-NEXT: [[RETVAL_FULL:%.*]] = alloca [2 x i32], align 4
-; CHECK-OPAQUE-NEXT: [[DOTFCA_0_GEP:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i32 0, i32 0
-; CHECK-OPAQUE-NEXT: store i32 0, ptr [[DOTFCA_0_GEP]], align 4
-; CHECK-OPAQUE-NEXT: [[DOTFCA_1_GEP:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i32 0, i32 1
-; CHECK-OPAQUE-NEXT: store i32 0, ptr [[DOTFCA_1_GEP]], align 4
-; CHECK-OPAQUE-NEXT: [[RETVAL:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i64 0, i64 1
-; CHECK-OPAQUE-NEXT: br label [[LOOP:%.*]]
-; CHECK-OPAQUE: loop:
-; CHECK-OPAQUE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-OPAQUE-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[DATA:%.*]], i64 [[INDVARS_IV]]
-; CHECK-OPAQUE-NEXT: [[LD:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
-; CHECK-OPAQUE-NEXT: [[RDX:%.*]] = load i32, ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: [[RDX_INC:%.*]] = add nsw i32 [[RDX]], [[LD]]
-; CHECK-OPAQUE-NEXT: store i32 [[RDX_INC]], ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
-; CHECK-OPAQUE-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
-; CHECK-OPAQUE-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]]
-; CHECK-OPAQUE: exit:
-; CHECK-OPAQUE-NEXT: [[I0:%.*]] = call i32 @user_of_alloca_with_multiple_args(ptr [[RETVAL]], ptr [[RETVAL_FULL]])
-; CHECK-OPAQUE-NEXT: [[I1_FCA_0_GEP:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i32 0, i32 0
-; CHECK-OPAQUE-NEXT: [[I1_FCA_0_LOAD:%.*]] = load i32, ptr [[I1_FCA_0_GEP]], align 4
-; CHECK-OPAQUE-NEXT: [[I1_FCA_0_INSERT:%.*]] = insertvalue [2 x i32] poison, i32 [[I1_FCA_0_LOAD]], 0
-; CHECK-OPAQUE-NEXT: [[I1_FCA_1_GEP:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i32 0, i32 1
-; CHECK-OPAQUE-NEXT: [[I1_FCA_1_LOAD:%.*]] = load i32, ptr [[I1_FCA_1_GEP]], align 4
-; CHECK-OPAQUE-NEXT: [[I1_FCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[I1_FCA_0_INSERT]], i32 [[I1_FCA_1_LOAD]], 1
-; CHECK-OPAQUE-NEXT: ret [2 x i32] [[I1_FCA_1_INSERT]]
-;
entry:
%retval.full = alloca [2 x i32], align 4
store [2 x i32] zeroinitializer, ptr %retval.full, align 4
@@ -869,37 +584,6 @@ define [2 x i32] @all_parts_of_alloca_used_in_call_with_multiple_args_with_memcp
; CHECK-NEXT: [[I1_FCA_1_LOAD:%.*]] = load i32, ptr [[I1_FCA_1_GEP]], align 4
; CHECK-NEXT: [[I1_FCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[I1_FCA_0_INSERT]], i32 [[I1_FCA_1_LOAD]], 1
; CHECK-NEXT: ret [2 x i32] [[I1_FCA_1_INSERT]]
-;
-; CHECK-OPAQUE-LABEL: @all_parts_of_alloca_used_in_call_with_multiple_args_with_memcpy_before_call(
-; CHECK-OPAQUE-NEXT: entry:
-; CHECK-OPAQUE-NEXT: [[RETVAL_FULL:%.*]] = alloca [2 x i32], align 4
-; CHECK-OPAQUE-NEXT: [[DOTFCA_0_GEP:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i32 0, i32 0
-; CHECK-OPAQUE-NEXT: store i32 0, ptr [[DOTFCA_0_GEP]], align 4
-; CHECK-OPAQUE-NEXT: [[DOTFCA_1_GEP:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i32 0, i32 1
-; CHECK-OPAQUE-NEXT: store i32 0, ptr [[DOTFCA_1_GEP]], align 4
-; CHECK-OPAQUE-NEXT: [[RETVAL:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i64 0, i64 1
-; CHECK-OPAQUE-NEXT: br label [[LOOP:%.*]]
-; CHECK-OPAQUE: loop:
-; CHECK-OPAQUE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-OPAQUE-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[DATA:%.*]], i64 [[INDVARS_IV]]
-; CHECK-OPAQUE-NEXT: [[LD:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
-; CHECK-OPAQUE-NEXT: [[RDX:%.*]] = load i32, ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: [[RDX_INC:%.*]] = add nsw i32 [[RDX]], [[LD]]
-; CHECK-OPAQUE-NEXT: store i32 [[RDX_INC]], ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
-; CHECK-OPAQUE-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
-; CHECK-OPAQUE-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]]
-; CHECK-OPAQUE: exit:
-; CHECK-OPAQUE-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr [[RETVAL_FULL]], ptr [[RETVAL]], i32 4, i1 false)
-; CHECK-OPAQUE-NEXT: [[I0:%.*]] = call i32 @user_of_alloca_with_multiple_args(ptr [[RETVAL]], ptr [[RETVAL_FULL]])
-; CHECK-OPAQUE-NEXT: [[I1_FCA_0_GEP:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i32 0, i32 0
-; CHECK-OPAQUE-NEXT: [[I1_FCA_0_LOAD:%.*]] = load i32, ptr [[I1_FCA_0_GEP]], align 4
-; CHECK-OPAQUE-NEXT: [[I1_FCA_0_INSERT:%.*]] = insertvalue [2 x i32] poison, i32 [[I1_FCA_0_LOAD]], 0
-; CHECK-OPAQUE-NEXT: [[I1_FCA_1_GEP:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i32 0, i32 1
-; CHECK-OPAQUE-NEXT: [[I1_FCA_1_LOAD:%.*]] = load i32, ptr [[I1_FCA_1_GEP]], align 4
-; CHECK-OPAQUE-NEXT: [[I1_FCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[I1_FCA_0_INSERT]], i32 [[I1_FCA_1_LOAD]], 1
-; CHECK-OPAQUE-NEXT: ret [2 x i32] [[I1_FCA_1_INSERT]]
-;
entry:
%retval.full = alloca [2 x i32], align 4
store [2 x i32] zeroinitializer, ptr %retval.full, align 4
@@ -954,37 +638,6 @@ define [2 x i32] @all_parts_of_alloca_used_in_call_with_multiple_args_with_memcp
; CHECK-NEXT: [[I1_FCA_1_LOAD:%.*]] = load i32, ptr [[I1_FCA_1_GEP]], align 4
; CHECK-NEXT: [[I1_FCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[I1_FCA_0_INSERT]], i32 [[I1_FCA_1_LOAD]], 1
; CHECK-NEXT: ret [2 x i32] [[I1_FCA_1_INSERT]]
-;
-; CHECK-OPAQUE-LABEL: @all_parts_of_alloca_used_in_call_with_multiple_args_with_memcpy_after_call(
-; CHECK-OPAQUE-NEXT: entry:
-; CHECK-OPAQUE-NEXT: [[RETVAL_FULL:%.*]] = alloca [2 x i32], align 4
-; CHECK-OPAQUE-NEXT: [[DOTFCA_0_GEP:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i32 0, i32 0
-; CHECK-OPAQUE-NEXT: store i32 0, ptr [[DOTFCA_0_GEP]], align 4
-; CHECK-OPAQUE-NEXT: [[DOTFCA_1_GEP:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i32 0, i32 1
-; CHECK-OPAQUE-NEXT: store i32 0, ptr [[DOTFCA_1_GEP]], align 4
-; CHECK-OPAQUE-NEXT: [[RETVAL:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i64 0, i64 1
-; CHECK-OPAQUE-NEXT: br label [[LOOP:%.*]]
-; CHECK-OPAQUE: loop:
-; CHECK-OPAQUE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-OPAQUE-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[DATA:%.*]], i64 [[INDVARS_IV]]
-; CHECK-OPAQUE-NEXT: [[LD:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
-; CHECK-OPAQUE-NEXT: [[RDX:%.*]] = load i32, ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: [[RDX_INC:%.*]] = add nsw i32 [[RDX]], [[LD]]
-; CHECK-OPAQUE-NEXT: store i32 [[RDX_INC]], ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
-; CHECK-OPAQUE-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
-; CHECK-OPAQUE-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]]
-; CHECK-OPAQUE: exit:
-; CHECK-OPAQUE-NEXT: [[I0:%.*]] = call i32 @user_of_alloca_with_multiple_args(ptr [[RETVAL]], ptr [[RETVAL_FULL]])
-; CHECK-OPAQUE-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr [[RETVAL_FULL]], ptr [[RETVAL]], i32 4, i1 false)
-; CHECK-OPAQUE-NEXT: [[I1_FCA_0_GEP:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i32 0, i32 0
-; CHECK-OPAQUE-NEXT: [[I1_FCA_0_LOAD:%.*]] = load i32, ptr [[I1_FCA_0_GEP]], align 4
-; CHECK-OPAQUE-NEXT: [[I1_FCA_0_INSERT:%.*]] = insertvalue [2 x i32] poison, i32 [[I1_FCA_0_LOAD]], 0
-; CHECK-OPAQUE-NEXT: [[I1_FCA_1_GEP:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i32 0, i32 1
-; CHECK-OPAQUE-NEXT: [[I1_FCA_1_LOAD:%.*]] = load i32, ptr [[I1_FCA_1_GEP]], align 4
-; CHECK-OPAQUE-NEXT: [[I1_FCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[I1_FCA_0_INSERT]], i32 [[I1_FCA_1_LOAD]], 1
-; CHECK-OPAQUE-NEXT: ret [2 x i32] [[I1_FCA_1_INSERT]]
-;
entry:
%retval.full = alloca [2 x i32], align 4
store [2 x i32] zeroinitializer, ptr %retval.full, align 4
@@ -1038,36 +691,6 @@ define [2 x i32] @part_of_alloca_used_in_call_with_multiple_args(ptr %data, i64
; CHECK-NEXT: [[I1_FCA_1_LOAD:%.*]] = load i32, ptr [[I1_FCA_1_GEP]], align 4
; CHECK-NEXT: [[I1_FCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[I1_FCA_0_INSERT]], i32 [[I1_FCA_1_LOAD]], 1
; CHECK-NEXT: ret [2 x i32] [[I1_FCA_1_INSERT]]
-;
-; CHECK-OPAQUE-LABEL: @part_of_alloca_used_in_call_with_multiple_args(
-; CHECK-OPAQUE-NEXT: entry:
-; CHECK-OPAQUE-NEXT: [[RETVAL_FULL:%.*]] = alloca [2 x i32], align 4
-; CHECK-OPAQUE-NEXT: [[DOTFCA_0_GEP:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i32 0, i32 0
-; CHECK-OPAQUE-NEXT: store i32 0, ptr [[DOTFCA_0_GEP]], align 4
-; CHECK-OPAQUE-NEXT: [[DOTFCA_1_GEP:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i32 0, i32 1
-; CHECK-OPAQUE-NEXT: store i32 0, ptr [[DOTFCA_1_GEP]], align 4
-; CHECK-OPAQUE-NEXT: [[RETVAL:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i64 0, i64 1
-; CHECK-OPAQUE-NEXT: br label [[LOOP:%.*]]
-; CHECK-OPAQUE: loop:
-; CHECK-OPAQUE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-OPAQUE-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[DATA:%.*]], i64 [[INDVARS_IV]]
-; CHECK-OPAQUE-NEXT: [[LD:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
-; CHECK-OPAQUE-NEXT: [[RDX:%.*]] = load i32, ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: [[RDX_INC:%.*]] = add nsw i32 [[RDX]], [[LD]]
-; CHECK-OPAQUE-NEXT: store i32 [[RDX_INC]], ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
-; CHECK-OPAQUE-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
-; CHECK-OPAQUE-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]]
-; CHECK-OPAQUE: exit:
-; CHECK-OPAQUE-NEXT: [[I0:%.*]] = call i32 @user_of_alloca_with_multiple_args(ptr [[RETVAL]], ptr [[RETVAL]])
-; CHECK-OPAQUE-NEXT: [[I1_FCA_0_GEP:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i32 0, i32 0
-; CHECK-OPAQUE-NEXT: [[I1_FCA_0_LOAD:%.*]] = load i32, ptr [[I1_FCA_0_GEP]], align 4
-; CHECK-OPAQUE-NEXT: [[I1_FCA_0_INSERT:%.*]] = insertvalue [2 x i32] poison, i32 [[I1_FCA_0_LOAD]], 0
-; CHECK-OPAQUE-NEXT: [[I1_FCA_1_GEP:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i32 0, i32 1
-; CHECK-OPAQUE-NEXT: [[I1_FCA_1_LOAD:%.*]] = load i32, ptr [[I1_FCA_1_GEP]], align 4
-; CHECK-OPAQUE-NEXT: [[I1_FCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[I1_FCA_0_INSERT]], i32 [[I1_FCA_1_LOAD]], 1
-; CHECK-OPAQUE-NEXT: ret [2 x i32] [[I1_FCA_1_INSERT]]
-;
entry:
%retval.full = alloca [2 x i32], align 4
store [2 x i32] zeroinitializer, ptr %retval.full, align 4
@@ -1123,39 +746,6 @@ define [2 x i32] @all_parts_of_alloca_used_in_calls_with_multiple_args(ptr %data
; CHECK-NEXT: [[I3_FCA_1_LOAD:%.*]] = load i32, ptr [[I3_FCA_1_GEP]], align 4
; CHECK-NEXT: [[I3_FCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[I3_FCA_0_INSERT]], i32 [[I3_FCA_1_LOAD]], 1
; CHECK-NEXT: ret [2 x i32] [[I3_FCA_1_INSERT]]
-;
-; CHECK-OPAQUE-LABEL: @all_parts_of_alloca_used_in_calls_with_multiple_args(
-; CHECK-OPAQUE-NEXT: entry:
-; CHECK-OPAQUE-NEXT: [[RETVAL_FULL:%.*]] = alloca [2 x i32], align 4
-; CHECK-OPAQUE-NEXT: [[SOME_ANOTHER_ALLOCA_FULL:%.*]] = alloca [42 x i32], align 4
-; CHECK-OPAQUE-NEXT: [[DOTFCA_0_GEP:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i32 0, i32 0
-; CHECK-OPAQUE-NEXT: store i32 0, ptr [[DOTFCA_0_GEP]], align 4
-; CHECK-OPAQUE-NEXT: [[DOTFCA_1_GEP:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i32 0, i32 1
-; CHECK-OPAQUE-NEXT: store i32 0, ptr [[DOTFCA_1_GEP]], align 4
-; CHECK-OPAQUE-NEXT: [[RETVAL:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i64 0, i64 1
-; CHECK-OPAQUE-NEXT: br label [[LOOP:%.*]]
-; CHECK-OPAQUE: loop:
-; CHECK-OPAQUE-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-OPAQUE-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[DATA:%.*]], i64 [[INDVARS_IV]]
-; CHECK-OPAQUE-NEXT: [[LD:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
-; CHECK-OPAQUE-NEXT: [[RDX:%.*]] = load i32, ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: [[RDX_INC:%.*]] = add nsw i32 [[RDX]], [[LD]]
-; CHECK-OPAQUE-NEXT: store i32 [[RDX_INC]], ptr [[RETVAL]], align 4
-; CHECK-OPAQUE-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], 1
-; CHECK-OPAQUE-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
-; CHECK-OPAQUE-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]]
-; CHECK-OPAQUE: exit:
-; CHECK-OPAQUE-NEXT: [[I0:%.*]] = call i32 @user_of_alloca_with_multiple_args(ptr [[RETVAL]], ptr [[RETVAL_FULL]])
-; CHECK-OPAQUE-NEXT: [[I1:%.*]] = call i32 @user_of_alloca_with_multiple_args(ptr [[RETVAL_FULL]], ptr [[RETVAL]])
-; CHECK-OPAQUE-NEXT: [[I2:%.*]] = call i32 @capture_of_alloca(ptr [[SOME_ANOTHER_ALLOCA_FULL]])
-; CHECK-OPAQUE-NEXT: [[I3_FCA_0_GEP:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i32 0, i32 0
-; CHECK-OPAQUE-NEXT: [[I3_FCA_0_LOAD:%.*]] = load i32, ptr [[I3_FCA_0_GEP]], align 4
-; CHECK-OPAQUE-NEXT: [[I3_FCA_0_INSERT:%.*]] = insertvalue [2 x i32] poison, i32 [[I3_FCA_0_LOAD]], 0
-; CHECK-OPAQUE-NEXT: [[I3_FCA_1_GEP:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i32 0, i32 1
-; CHECK-OPAQUE-NEXT: [[I3_FCA_1_LOAD:%.*]] = load i32, ptr [[I3_FCA_1_GEP]], align 4
-; CHECK-OPAQUE-NEXT: [[I3_FCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[I3_FCA_0_INSERT]], i32 [[I3_FCA_1_LOAD]], 1
-; CHECK-OPAQUE-NEXT: ret [2 x i32] [[I3_FCA_1_INSERT]]
-;
entry:
%retval.full = alloca [2 x i32], align 4
%some.another.alloca.full = alloca [42 x i32], align 4
@@ -1189,14 +779,6 @@ define i32 @all_uses_of_alloca_are_calls(ptr %data, i64 %n) {
; CHECK-NEXT: [[TMP0:%.*]] = call i32 @user_of_alloca(ptr [[RETVAL]])
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @user_of_alloca(ptr [[RETVAL]])
; CHECK-NEXT: ret i32 0
-;
-; CHECK-OPAQUE-LABEL: @all_uses_of_alloca_are_calls(
-; CHECK-OPAQUE-NEXT: entry:
-; CHECK-OPAQUE-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
-; CHECK-OPAQUE-NEXT: [[TMP0:%.*]] = call i32 @user_of_alloca(ptr [[RETVAL]])
-; CHECK-OPAQUE-NEXT: [[TMP1:%.*]] = call i32 @user_of_alloca(ptr [[RETVAL]])
-; CHECK-OPAQUE-NEXT: ret i32 0
-;
entry:
%retval = alloca i32, align 4
call i32 @user_of_alloca(ptr %retval)
@@ -1210,33 +792,17 @@ define i64 @do_schedule_instrs_for_dce_after_fixups() {
; CHECK-LABEL: @do_schedule_instrs_for_dce_after_fixups(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[C:%.*]] = alloca i64, align 2
-; CHECK-NEXT: [[TMP0:%.*]] = bitcast ptr [[C]] to ptr
-; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 1, ptr [[TMP0]])
+; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 1, ptr [[C]])
; CHECK-NEXT: store i64 0, ptr [[C]], align 4
; CHECK-NEXT: br label [[IF_END:%.*]]
; CHECK: if.end:
; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, ptr [[C]], i64 1
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @user_of_alloca(ptr [[ADD_PTR]])
+; CHECK-NEXT: [[TMP0:%.*]] = call i32 @user_of_alloca(ptr [[ADD_PTR]])
; CHECK-NEXT: [[LD:%.*]] = load i64, ptr [[C]], align 4
; CHECK-NEXT: ret i64 [[LD]]
-;
-; CHECK-OPAQUE-LABEL: @do_schedule_instrs_for_dce_after_fixups(
-; CHECK-OPAQUE-NEXT: entry:
-; CHECK-OPAQUE-NEXT: [[C:%.*]] = alloca i64, align 2
-; CHECK-OPAQUE-NEXT: [[TMP0:%.*]] = bitcast ptr [[C]] to ptr
-; CHECK-OPAQUE-NEXT: call void @llvm.lifetime.start.p0(i64 1, ptr [[TMP0]])
-; CHECK-OPAQUE-NEXT: store i64 0, ptr [[C]], align 4
-; CHECK-OPAQUE-NEXT: br label [[IF_END:%.*]]
-; CHECK-OPAQUE: if.end:
-; CHECK-OPAQUE-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, ptr [[C]], i64 1
-; CHECK-OPAQUE-NEXT: [[TMP1:%.*]] = call i32 @user_of_alloca(ptr [[ADD_PTR]])
-; CHECK-OPAQUE-NEXT: [[LD:%.*]] = load i64, ptr [[C]], align 4
-; CHECK-OPAQUE-NEXT: ret i64 [[LD]]
-;
entry:
%c = alloca i64, align 2
- %0 = bitcast ptr %c to ptr
- call void @llvm.lifetime.start.p0(i64 1, ptr %0)
+ call void @llvm.lifetime.start.p0(i64 1, ptr %c)
store i64 0, ptr %c
br label %if.end
@@ -1254,14 +820,6 @@ define void @dont_transform_store_only() {
; CHECK-NEXT: store i8 0, ptr [[A]], align 1
; CHECK-NEXT: call void @byte_user_of_alloca(ptr [[A]])
; CHECK-NEXT: ret void
-;
-; CHECK-OPAQUE-LABEL: @dont_transform_store_only(
-; CHECK-OPAQUE-NEXT: entry:
-; CHECK-OPAQUE-NEXT: [[A:%.*]] = alloca i8, align 1
-; CHECK-OPAQUE-NEXT: store i8 0, ptr [[A]], align 1
-; CHECK-OPAQUE-NEXT: call void @byte_user_of_alloca(ptr [[A]])
-; CHECK-OPAQUE-NEXT: ret void
-;
entry:
%a = alloca i8
store i8 0, ptr %a
@@ -1275,14 +833,6 @@ define i8 @dont_transform_load_only() {
; CHECK-NEXT: call void @byte_user_of_alloca(ptr [[A]])
; CHECK-NEXT: [[R:%.*]] = load i8, ptr [[A]], align 1
; CHECK-NEXT: ret i8 [[R]]
-;
-; CHECK-OPAQUE-LABEL: @dont_transform_load_only(
-; CHECK-OPAQUE-NEXT: entry:
-; CHECK-OPAQUE-NEXT: [[A:%.*]] = alloca i8, align 1
-; CHECK-OPAQUE-NEXT: call void @byte_user_of_alloca(ptr [[A]])
-; CHECK-OPAQUE-NEXT: [[R:%.*]] = load i8, ptr [[A]], align 1
-; CHECK-OPAQUE-NEXT: ret i8 [[R]]
-;
entry:
%a = alloca i8
call void @byte_user_of_alloca(ptr %a)
@@ -1297,15 +847,6 @@ define i8 @transform_load_and_store() {
; CHECK-NEXT: call void @byte_user_of_alloca(ptr [[A]])
; CHECK-NEXT: [[R:%.*]] = load i8, ptr [[A]], align 1
; CHECK-NEXT: ret i8 [[R]]
-;
-; CHECK-OPAQUE-LABEL: @transform_load_and_store(
-; CHECK-OPAQUE-NEXT: entry:
-; CHECK-OPAQUE-NEXT: [[A:%.*]] = alloca i8, align 1
-; CHECK-OPAQUE-NEXT: store i8 0, ptr [[A]], align 1
-; CHECK-OPAQUE-NEXT: call void @byte_user_of_alloca(ptr [[A]])
-; CHECK-OPAQUE-NEXT: [[R:%.*]] = load i8, ptr [[A]], align 1
-; CHECK-OPAQUE-NEXT: ret i8 [[R]]
-;
entry:
%a = alloca i8
store i8 0, ptr %a
@@ -1333,26 +874,6 @@ define [2 x i32] @select_of_ptrs(ptr %data, i1 %c, i32 %v) {
; CHECK-NEXT: [[I1_FCA_1_LOAD:%.*]] = load i32, ptr [[I1_FCA_1_GEP]], align 4
; CHECK-NEXT: [[I1_FCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[I1_FCA_0_INSERT]], i32 [[I1_FCA_1_LOAD]], 1
; CHECK-NEXT: ret [2 x i32] [[I1_FCA_1_INSERT]]
-;
-; CHECK-OPAQUE-LABEL: @select_of_ptrs(
-; CHECK-OPAQUE-NEXT: entry:
-; CHECK-OPAQUE-NEXT: [[RETVAL_FULL:%.*]] = alloca [2 x i32], align 4
-; CHECK-OPAQUE-NEXT: [[DOTFCA_0_GEP:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i32 0, i32 0
-; CHECK-OPAQUE-NEXT: store i32 0, ptr [[DOTFCA_0_GEP]], align 4
-; CHECK-OPAQUE-NEXT: [[DOTFCA_1_GEP:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i32 0, i32 1
-; CHECK-OPAQUE-NEXT: store i32 0, ptr [[DOTFCA_1_GEP]], align 4
-; CHECK-OPAQUE-NEXT: [[RETVAL:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i64 0, i64 1
-; CHECK-OPAQUE-NEXT: [[PTR:%.*]] = select i1 [[C:%.*]], ptr [[RETVAL_FULL]], ptr [[RETVAL]]
-; CHECK-OPAQUE-NEXT: store i32 [[V:%.*]], ptr [[PTR]], align 4
-; CHECK-OPAQUE-NEXT: [[I0:%.*]] = call i32 @user_of_alloca(ptr [[RETVAL_FULL]])
-; CHECK-OPAQUE-NEXT: [[I1_FCA_0_GEP:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i32 0, i32 0
-; CHECK-OPAQUE-NEXT: [[I1_FCA_0_LOAD:%.*]] = load i32, ptr [[I1_FCA_0_GEP]], align 4
-; CHECK-OPAQUE-NEXT: [[I1_FCA_0_INSERT:%.*]] = insertvalue [2 x i32] poison, i32 [[I1_FCA_0_LOAD]], 0
-; CHECK-OPAQUE-NEXT: [[I1_FCA_1_GEP:%.*]] = getelementptr inbounds [2 x i32], ptr [[RETVAL_FULL]], i32 0, i32 1
-; CHECK-OPAQUE-NEXT: [[I1_FCA_1_LOAD:%.*]] = load i32, ptr [[I1_FCA_1_GEP]], align 4
-; CHECK-OPAQUE-NEXT: [[I1_FCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[I1_FCA_0_INSERT]], i32 [[I1_FCA_1_LOAD]], 1
-; CHECK-OPAQUE-NEXT: ret [2 x i32] [[I1_FCA_1_INSERT]]
-;
entry:
%retval.full = alloca [2 x i32], align 4
store [2 x i32] zeroinitializer, ptr %retval.full, align 4
diff --git a/llvm/test/Transforms/SROA/non-integral-pointers.ll b/llvm/test/Transforms/SROA/non-integral-pointers.ll
index 75919f455dc31..10d5270a1ea20 100644
--- a/llvm/test/Transforms/SROA/non-integral-pointers.ll
+++ b/llvm/test/Transforms/SROA/non-integral-pointers.ll
@@ -88,11 +88,9 @@ alwaysTaken:
; CHECK-NOT: int2ptr
define ptr at f2(ptr addrspace(4) %p) {
%1 = alloca %union.anon, align 8
- %2 = bitcast ptr %1 to ptr
- store ptr addrspace(4) %p, ptr %2, align 8
- %3 = bitcast ptr %1 to ptr
- %4 = load ptr, ptr %3, align 8
- ret ptr %4
+ store ptr addrspace(4) %p, ptr %1, align 8
+ %2 = load ptr, ptr %1, align 8
+ ret ptr %2
}
declare void @llvm.memset.p0.i64(ptr, i8, i64, i1)
diff --git a/llvm/test/Transforms/SROA/pointer-offset-size.ll b/llvm/test/Transforms/SROA/pointer-offset-size.ll
index 8968c8ca610cc..1fa7f9cf385a7 100644
--- a/llvm/test/Transforms/SROA/pointer-offset-size.ll
+++ b/llvm/test/Transforms/SROA/pointer-offset-size.ll
@@ -9,18 +9,15 @@ define i16 @test(ptr %ts2.i) {
; CHECK-LABEL: @test(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[S_SROA_0:%.*]] = alloca [3 x i8], align 8
-; CHECK-NEXT: [[TMP0:%.*]] = bitcast ptr [[TS2_I:%.*]] to ptr
-; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 1 [[TMP0]], ptr align 8 [[S_SROA_0]], i32 3, i1 false)
+; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 1 [[TS2_I:%.*]], ptr align 8 [[S_SROA_0]], i32 3, i1 false)
; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr [[TS2_I]], align 2
; CHECK-NEXT: ret i16 [[TMP1]]
;
entry:
%s = alloca %struct.test
- %0 = bitcast ptr %ts2.i to ptr
- %1 = bitcast ptr %s to ptr
- call void @llvm.memcpy.p0.p0.i32(ptr %0, ptr %1, i32 3, i1 false)
- %2 = load i16, ptr %ts2.i
- ret i16 %2
+ call void @llvm.memcpy.p0.p0.i32(ptr %ts2.i, ptr %s, i32 3, i1 false)
+ %0 = load i16, ptr %ts2.i
+ ret i16 %0
}
declare void @llvm.memcpy.p0.p0.i32(ptr nocapture writeonly, ptr nocapture readonly, i32, i1)
diff --git a/llvm/test/Transforms/SROA/ppcf128-no-fold.ll b/llvm/test/Transforms/SROA/ppcf128-no-fold.ll
index c991c0d679aa2..e38138e8d3de9 100644
--- a/llvm/test/Transforms/SROA/ppcf128-no-fold.ll
+++ b/llvm/test/Transforms/SROA/ppcf128-no-fold.ll
@@ -14,9 +14,8 @@ entry:
%arrayidx2 = getelementptr inbounds [2 x ppc_fp128], ptr %z, i32 0, i64 1
store ppc_fp128 0xM4093B400000000000000000000000000, ptr %arrayidx2, align 16
%0 = load ptr, ptr %v.addr, align 8
- %1 = bitcast ptr %z to ptr
- %2 = load [2 x i128], ptr %1, align 1
- call void @bar(ptr %0, [2 x i128] %2)
+ %1 = load [2 x i128], ptr %z, align 1
+ call void @bar(ptr %0, [2 x i128] %1)
ret void
}
diff --git a/llvm/test/Transforms/SROA/scalable-vectors.ll b/llvm/test/Transforms/SROA/scalable-vectors.ll
index a6a57fa408a3c..401e1ca8a1945 100644
--- a/llvm/test/Transforms/SROA/scalable-vectors.ll
+++ b/llvm/test/Transforms/SROA/scalable-vectors.ll
@@ -45,25 +45,21 @@ define <vscale x 4 x i32> @cast_alloca_to_svint32_t(<vscale x 4 x i32> %type.coe
; CHECK-LABEL: @cast_alloca_to_svint32_t(
; CHECK-NEXT: [[TYPE:%.*]] = alloca <16 x i32>, align 64
; CHECK-NEXT: [[TYPE_ADDR:%.*]] = alloca <16 x i32>, align 64
-; CHECK-NEXT: [[TMP1:%.*]] = bitcast ptr [[TYPE]] to ptr
-; CHECK-NEXT: store <vscale x 4 x i32> [[TYPE_COERCE:%.*]], ptr [[TMP1]], align 16
+; CHECK-NEXT: store <vscale x 4 x i32> [[TYPE_COERCE:%.*]], ptr [[TYPE]], align 16
; CHECK-NEXT: [[TYPE1:%.*]] = load <16 x i32>, ptr [[TYPE]], align 64
; CHECK-NEXT: store <16 x i32> [[TYPE1]], ptr [[TYPE_ADDR]], align 64
; CHECK-NEXT: [[TMP2:%.*]] = load <16 x i32>, ptr [[TYPE_ADDR]], align 64
-; CHECK-NEXT: [[TMP3:%.*]] = bitcast ptr [[TYPE_ADDR]] to ptr
-; CHECK-NEXT: [[TMP4:%.*]] = load <vscale x 4 x i32>, ptr [[TMP3]], align 16
+; CHECK-NEXT: [[TMP4:%.*]] = load <vscale x 4 x i32>, ptr [[TYPE_ADDR]], align 16
; CHECK-NEXT: ret <vscale x 4 x i32> [[TMP4]]
;
%type = alloca <16 x i32>
%type.addr = alloca <16 x i32>
- %1 = bitcast ptr %type to ptr
- store <vscale x 4 x i32> %type.coerce, ptr %1
+ store <vscale x 4 x i32> %type.coerce, ptr %type
%type1 = load <16 x i32>, ptr %type
store <16 x i32> %type1, ptr %type.addr
- %2 = load <16 x i32>, ptr %type.addr
- %3 = bitcast ptr %type.addr to ptr
- %4 = load <vscale x 4 x i32>, ptr %3
- ret <vscale x 4 x i32> %4
+ %1 = load <16 x i32>, ptr %type.addr
+ %2 = load <vscale x 4 x i32>, ptr %type.addr
+ ret <vscale x 4 x i32> %2
}
; When casting from VLA to VLS via memory check we bail out when producing a
@@ -71,18 +67,15 @@ define <vscale x 4 x i32> @cast_alloca_to_svint32_t(<vscale x 4 x i32> %type.coe
define <vscale x 4 x i32> @cast_alloca_from_svint32_t() {
; CHECK-LABEL: @cast_alloca_from_svint32_t(
; CHECK-NEXT: [[RETVAL_COERCE:%.*]] = alloca <vscale x 4 x i32>, align 16
-; CHECK-NEXT: [[TMP1:%.*]] = bitcast ptr [[RETVAL_COERCE]] to ptr
-; CHECK-NEXT: store <16 x i32> undef, ptr [[TMP1]], align 16
+; CHECK-NEXT: store <16 x i32> undef, ptr [[RETVAL_COERCE]], align 16
; CHECK-NEXT: [[TMP2:%.*]] = load <vscale x 4 x i32>, ptr [[RETVAL_COERCE]], align 16
; CHECK-NEXT: ret <vscale x 4 x i32> [[TMP2]]
;
%retval = alloca <16 x i32>
%retval.coerce = alloca <vscale x 4 x i32>
- %1 = bitcast ptr %retval.coerce to ptr
- %2 = bitcast ptr %retval to ptr
- call void @llvm.memcpy.p0.p0.i64(ptr align 16 %1, ptr align 16 %2, i64 64, i1 false)
- %3 = load <vscale x 4 x i32>, ptr %retval.coerce
- ret <vscale x 4 x i32> %3
+ call void @llvm.memcpy.p0.p0.i64(ptr align 16 %retval.coerce, ptr align 16 %retval, i64 64, i1 false)
+ %1 = load <vscale x 4 x i32>, ptr %retval.coerce
+ ret <vscale x 4 x i32> %1
}
declare void @llvm.memcpy.p0.p0.i64(ptr nocapture, ptr nocapture, i64, i1) nounwind
diff --git a/llvm/test/Transforms/SROA/slice-order-independence.ll b/llvm/test/Transforms/SROA/slice-order-independence.ll
index 6d7074f202df9..303f8b081f3c0 100644
--- a/llvm/test/Transforms/SROA/slice-order-independence.ll
+++ b/llvm/test/Transforms/SROA/slice-order-independence.ll
@@ -10,9 +10,7 @@ define void @skipped_inttype_first(ptr) {
; CHECK-LABEL: @skipped_inttype_first
; CHECK: alloca ptr
%arg = alloca { ptr, i32 }, align 8
- %2 = bitcast ptr %0 to ptr
- %3 = bitcast ptr %arg to ptr
- call void @llvm.memcpy.p0.p0.i32(ptr align 8 %3, ptr align 8 %2, i32 16, i1 false)
+ call void @llvm.memcpy.p0.p0.i32(ptr align 8 %arg, ptr align 8 %0, i32 16, i1 false)
%b = getelementptr inbounds { ptr, i32 }, ptr %arg, i64 0, i32 0
%b0 = load i63, ptr %b
%b1 = load ptr, ptr %b
@@ -23,9 +21,7 @@ define void @skipped_inttype_last(ptr) {
; CHECK-LABEL: @skipped_inttype_last
; CHECK: alloca ptr
%arg = alloca { ptr, i32 }, align 8
- %2 = bitcast ptr %0 to ptr
- %3 = bitcast ptr %arg to ptr
- call void @llvm.memcpy.p0.p0.i32(ptr align 8 %3, ptr align 8 %2, i32 16, i1 false)
+ call void @llvm.memcpy.p0.p0.i32(ptr align 8 %arg, ptr align 8 %0, i32 16, i1 false)
%b = getelementptr inbounds { ptr, i32 }, ptr %arg, i64 0, i32 0
%b1 = load ptr, ptr %b
%b0 = load i63, ptr %b
diff --git a/llvm/test/Transforms/SROA/slice-width.ll b/llvm/test/Transforms/SROA/slice-width.ll
index 96ba23f338fc1..7d2aeaaff57bc 100644
--- a/llvm/test/Transforms/SROA/slice-width.ll
+++ b/llvm/test/Transforms/SROA/slice-width.ll
@@ -94,32 +94,26 @@ declare i32 @memcpy_vec3float_helper(ptr)
define i32 @memcpy_vec3float_widening(ptr %x) {
; CHECK-LABEL: @memcpy_vec3float_widening(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = bitcast ptr [[X:%.*]] to ptr
-; CHECK-NEXT: [[TMP1_SROA_0_0_COPYLOAD:%.*]] = load <3 x float>, ptr [[TMP0]], align 4
+; CHECK-NEXT: [[TMP1_SROA_0_0_COPYLOAD:%.*]] = load <3 x float>, ptr [[X:%.*]], align 4
; CHECK-NEXT: [[TMP1_SROA_0_0_VEC_EXPAND:%.*]] = shufflevector <3 x float> [[TMP1_SROA_0_0_COPYLOAD]], <3 x float> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
; CHECK-NEXT: [[TMP1_SROA_0_0_VECBLEND:%.*]] = select <4 x i1> <i1 true, i1 true, i1 true, i1 false>, <4 x float> [[TMP1_SROA_0_0_VEC_EXPAND]], <4 x float> undef
; CHECK-NEXT: [[TMP2:%.*]] = alloca [[S_VEC3FLOAT:%.*]], align 4
-; CHECK-NEXT: [[TMP1:%.*]] = bitcast ptr [[TMP2]] to ptr
; CHECK-NEXT: [[TMP1_SROA_0_0_VEC_EXTRACT:%.*]] = shufflevector <4 x float> [[TMP1_SROA_0_0_VECBLEND]], <4 x float> poison, <3 x i32> <i32 0, i32 1, i32 2>
-; CHECK-NEXT: store <3 x float> [[TMP1_SROA_0_0_VEC_EXTRACT]], ptr [[TMP1]], align 4
+; CHECK-NEXT: store <3 x float> [[TMP1_SROA_0_0_VEC_EXTRACT]], ptr [[TMP2]], align 4
; CHECK-NEXT: [[RESULT:%.*]] = call i32 @memcpy_vec3float_helper(ptr [[TMP2]])
; CHECK-NEXT: ret i32 [[RESULT]]
;
entry:
; Create a temporary variable %tmp1 and copy %x[0] into it
%tmp1 = alloca %S.vec3float, align 4
- %0 = bitcast ptr %tmp1 to ptr
- %1 = bitcast ptr %x to ptr
- call void @llvm.memcpy.p0.p0.i32(ptr align 4 %0, ptr align 4 %1, i32 12, i1 false)
+ call void @llvm.memcpy.p0.p0.i32(ptr align 4 %tmp1, ptr align 4 %x, i32 12, i1 false)
; The following block does nothing; but appears to confuse SROA
%unused3 = load <4 x float>, ptr %tmp1, align 1
; Create a second temporary and copy %tmp1 into it
%tmp2 = alloca %S.vec3float, align 4
- %2 = bitcast ptr %tmp2 to ptr
- %3 = bitcast ptr %tmp1 to ptr
- call void @llvm.memcpy.p0.p0.i32(ptr align 4 %2, ptr align 4 %3, i32 12, i1 false)
+ call void @llvm.memcpy.p0.p0.i32(ptr align 4 %tmp2, ptr align 4 %tmp1, i32 12, i1 false)
%result = call i32 @memcpy_vec3float_helper(ptr %tmp2)
ret i32 %result
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