[PATCH] D126771: [fastalloc] Support allocate specific register class in fastalloc.

[LuoYuanke via Phabricator via llvm-commits]

LuoYuanke added inline comments.


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Comment at: llvm/test/CodeGen/AMDGPU/collapse-endcf.ll:425
 ; GCN-O0: [[INNER_LOOP:.LBB[0-9]+_[0-9]+]]:
+; GCN-O0: buffer_load_dword
 ; GCN-O0-DAG:  v_readlane_b32 s{{[0-9]+}}, [[VGPR]], [[INNER_LOOP_BACK_EDGE_EXEC_SPILL_LANE_0]]
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This is caused by 2 RA pass. Previous allocating specific register class doesn't work in fast RA.


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Comment at: llvm/test/CodeGen/AMDGPU/indirect-addressing-term.ll:43
+  ; GCN-NEXT:   renamable $sgpr15 = S_MOV_B32 0
+  ; GCN-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32 = COPY killed renamable $sgpr15
+  ; GCN-NEXT:   [[COPY2:%[0-9]+]]:vgpr_32 = COPY killed renamable $sgpr14
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Some register class is not allocated in the first fast RA pass.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D126771/new/

https://reviews.llvm.org/D126771