[PATCH] D128216: [X86] Add SimplifyMultipleUseDemandedBitsForTargetNode X86ISD::ANDNP handling

Simon Pilgrim via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 21 00:58:30 PDT 2022


RKSimon planned changes to this revision.
RKSimon added inline comments.


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:41821
+    if (DemandedBits.isSubsetOf(LHSKnown.One | RHSKnown.One))
+      return LHS;
+    if (DemandedBits.isSubsetOf(RHSKnown.Zero | LHSKnown.Zero))
----------------
pengfei wrote:
> Why return `LHS` rather than `~LHS`?
Doh! Nice catch! SimplifyMultipleUseDemandedBits isn't supposed to create nodes, I'll look at alternatives.


================
Comment at: llvm/test/CodeGen/X86/combine-udiv.ll:703
+; SSE2-NEXT:    pmulhuw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
+; SSE2-NEXT:    pand %xmm1, %xmm2
+; SSE2-NEXT:    por %xmm3, %xmm2
----------------
It looks like we're missing and(mulh(x,c1),c2) -> mulh(x,and(c1,c2)) fold for cases where c2 is all/none bits.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D128216/new/

https://reviews.llvm.org/D128216



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