[llvm] 163c77b - [AARCH64 folding] Do not fold any copy with NZCV

Serguei Katkov via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 20 20:39:10 PDT 2022


Author: Serguei Katkov
Date: 2022-06-21T10:38:49+07:00
New Revision: 163c77b2e0831853b59cdd24ece9637f8a19cc79

URL: https://github.com/llvm/llvm-project/commit/163c77b2e0831853b59cdd24ece9637f8a19cc79
DIFF: https://github.com/llvm/llvm-project/commit/163c77b2e0831853b59cdd24ece9637f8a19cc79.diff

LOG: [AARCH64 folding] Do not fold any copy with NZCV

There is no instruction to fold NZCV, so, just do not do it.

Without the fix the added test case crashes with an assert
"Mismatched register size in non subreg COPY"

Reviewed By: danilaml
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D127294

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
    llvm/test/CodeGen/AArch64/spill-fold.mir

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
index 77135de1d3f3..05fd190a6e54 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
@@ -4437,6 +4437,9 @@ MachineInstr *AArch64InstrInfo::foldMemoryOperandImpl(
       MF.getRegInfo().constrainRegClass(SrcReg, &AArch64::GPR64RegClass);
       return nullptr;
     }
+    // Nothing can folded with copy from/to NZCV.
+    if (SrcReg == AArch64::NZCV || DstReg == AArch64::NZCV)
+      return nullptr;
   }
 
   // Handle the case where a copy is being spilled or filled but the source

diff  --git a/llvm/test/CodeGen/AArch64/spill-fold.mir b/llvm/test/CodeGen/AArch64/spill-fold.mir
index 624fcc449b6c..02d409d04da7 100644
--- a/llvm/test/CodeGen/AArch64/spill-fold.mir
+++ b/llvm/test/CodeGen/AArch64/spill-fold.mir
@@ -5,6 +5,7 @@
   define i64 @test_subreg_spill_fold3() { ret i64 0 }
   define i64 @test_subreg_fill_fold() { ret i64 0 }
   define double @test_subreg_fill_fold2() { ret double 0.0 }
+  define i64 @test_nzcv_spill_fold() { ret i64 0 }
 ...
 ---
 # CHECK-LABEL: name: test_subreg_spill_fold
@@ -80,3 +81,18 @@ body:             |
     $d0 = COPY %1
     RET_ReallyLR implicit $d0
 ...
+---
+# CHECK-LABEL: name: test_nzcv_spill_fold
+# Ensure that nzcv COPY cannot be folded.
+name:            test_nzcv_spill_fold
+registers:
+  - { id: 0, class: gpr64 }
+body:             |
+  bb.0:
+    ; CHECK: %1:gpr64 = COPY $nzcv
+    ; CHECK: STRXui %1, %stack.0, 0 :: (store (s64) into %stack.0)
+    %0 = COPY $nzcv
+    INLINEASM &nop, 1, 12, implicit-def dead $x0, 12, implicit-def dead $x1, 12, implicit-def dead $x2, 12, implicit-def dead $x3, 12, implicit-def dead $x4, 12, implicit-def dead $x5, 12, implicit-def dead $x6, 12, implicit-def dead $x7, 12, implicit-def dead $x8, 12, implicit-def dead $x9, 12, implicit-def dead $x10, 12, implicit-def dead $x11, 12, implicit-def dead $x12, 12, implicit-def dead $x13, 12, implicit-def dead $x14, 12, implicit-def dead $x15, 12, implicit-def dead $x16, 12, implicit-def dead $x17, 12, implicit-def dead $x18, 12, implicit-def dead $x19, 12, implicit-def dead $x20, 12, implicit-def dead $x21, 12, implicit-def dead $x22, 12, implicit-def dead $x23, 12, implicit-def dead $x24, 12, implicit-def dead $x25, 12, implicit-def dead $x26, 12, implicit-def dead $x27, 12, implicit-def dead $x28, 12, implicit-def dead $fp, 12, implicit-def dead $lr, 12, implicit-def $sp
+    $x0 = COPY %0
+    RET_ReallyLR implicit $x0
+...


        


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