[PATCH] D128144: [AArch64] Known bits for AArch64ISD::DUP

Paul Walker via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 20 03:33:49 PDT 2022


paulwalker-arm added a comment.

In D128144#3595275 <https://reviews.llvm.org/D128144#3595275>, @dmgreen wrote:

> I'll take a look. In the long run I think I would like to remove AArch64ISD::DUP and just use ISD::SPLAT_VECTOR for all vectors across AArch64. That would take some time though, and would hit the same problem of canonicalising into a BUILD_VECTOR.

A while back I tried this and there were only a few places that relied on DAGCombine not messing with `AArch64ISD::DUP` in order to emit good code.  I didn't push on with it as I was unsure how others would feel.  Given the statement above I think I'll dig it because the easy first step is to restrict `AArch64ISD::DUP` to only fixed length vectors. Please let me know if you'd rather me hold off.


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  https://reviews.llvm.org/D128144/new/

https://reviews.llvm.org/D128144



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