[PATCH] D125836: [DAG] Fold (srl (shl x, c1), c2) -> and(shl/srl(x, c3), m)
Sanjay Patel via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Jun 19 12:21:42 PDT 2022
spatel accepted this revision.
spatel added a comment.
This revision is now accepted and ready to land.
LGTM - noted a close call in x86 tests, but that can be addressed if we find real regressions.
================
Comment at: llvm/test/CodeGen/X86/shift-mask.ll:597
+; X64-MASK-NEXT: shrq $2, %rdi
+; X64-MASK-NEXT: movabsq $576460752303423487, %rax # imm = 0x7FFFFFFFFFFFFFF
+; X64-MASK-NEXT: andq %rdi, %rax
----------------
This and the next diff might be worse depending on uarch, so that suggests a possible refinement for the x86 TLI hook for 64-bit integer.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D125836/new/
https://reviews.llvm.org/D125836
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