[llvm] b254d67 - [llvm] Call *set::insert without checking membership first (NFC)
Kazu Hirata via llvm-commits
llvm-commits at lists.llvm.org
Sat Jun 18 08:32:59 PDT 2022
Author: Kazu Hirata
Date: 2022-06-18T08:32:54-07:00
New Revision: b254d671604ca650a6bc27384c116989bf5fbd25
URL: https://github.com/llvm/llvm-project/commit/b254d671604ca650a6bc27384c116989bf5fbd25
DIFF: https://github.com/llvm/llvm-project/commit/b254d671604ca650a6bc27384c116989bf5fbd25.diff
LOG: [llvm] Call *set::insert without checking membership first (NFC)
Added:
Modified:
llvm/lib/Analysis/VectorUtils.cpp
llvm/lib/CodeGen/RDFLiveness.cpp
llvm/lib/CodeGen/SelectOptimize.cpp
llvm/lib/ExecutionEngine/Orc/Core.cpp
llvm/lib/IR/AsmWriter.cpp
llvm/lib/Target/ARM/MVELaneInterleavingPass.cpp
llvm/lib/Target/Hexagon/BitTracker.cpp
llvm/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp
llvm/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp
llvm/lib/Transforms/Scalar/NewGVN.cpp
llvm/utils/TableGen/RegisterBankEmitter.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Analysis/VectorUtils.cpp b/llvm/lib/Analysis/VectorUtils.cpp
index a53b216384d15..beb14c456da8a 100644
--- a/llvm/lib/Analysis/VectorUtils.cpp
+++ b/llvm/lib/Analysis/VectorUtils.cpp
@@ -658,9 +658,8 @@ llvm::computeMinimumValueSizes(ArrayRef<BasicBlock *> Blocks, DemandedBits &DB,
Value *Val = Worklist.pop_back_val();
Value *Leader = ECs.getOrInsertLeaderValue(Val);
- if (Visited.count(Val))
+ if (!Visited.insert(Val).second)
continue;
- Visited.insert(Val);
// Non-instructions terminate a chain successfully.
if (!isa<Instruction>(Val))
diff --git a/llvm/lib/CodeGen/RDFLiveness.cpp b/llvm/lib/CodeGen/RDFLiveness.cpp
index ccfa6bf4e18a0..2fd947086b4d6 100644
--- a/llvm/lib/CodeGen/RDFLiveness.cpp
+++ b/llvm/lib/CodeGen/RDFLiveness.cpp
@@ -340,9 +340,8 @@ Liveness::getAllReachingDefsRecImpl(RegisterRef RefRR, NodeAddr<RefNode*> RefA,
if (!(DA.Addr->getFlags() & NodeAttrs::PhiRef))
continue;
NodeAddr<PhiNode*> PA = DA.Addr->getOwner(DFG);
- if (Visited.count(PA.Id))
+ if (!Visited.insert(PA.Id).second)
continue;
- Visited.insert(PA.Id);
// Go over all phi uses and get the reaching defs for each use.
for (auto U : PA.Addr->members_if(DFG.IsRef<NodeAttrs::Use>, DFG)) {
const auto &T = getAllReachingDefsRecImpl(RefRR, U, Visited, TmpDefs,
diff --git a/llvm/lib/CodeGen/SelectOptimize.cpp b/llvm/lib/CodeGen/SelectOptimize.cpp
index 9c786b9a5588e..d55329a8788c0 100644
--- a/llvm/lib/CodeGen/SelectOptimize.cpp
+++ b/llvm/lib/CodeGen/SelectOptimize.cpp
@@ -720,9 +720,8 @@ void SelectOptimize::getExclBackwardsSlice(Instruction *I,
Worklist.pop();
// Avoid cycles.
- if (Visited.count(II))
+ if (!Visited.insert(II).second)
continue;
- Visited.insert(II);
if (!II->hasOneUse())
continue;
diff --git a/llvm/lib/ExecutionEngine/Orc/Core.cpp b/llvm/lib/ExecutionEngine/Orc/Core.cpp
index 9a90fe973da28..dd80630a33c15 100644
--- a/llvm/lib/ExecutionEngine/Orc/Core.cpp
+++ b/llvm/lib/ExecutionEngine/Orc/Core.cpp
@@ -2021,9 +2021,8 @@ JITDylib::getDFSLinkOrder(ArrayRef<JITDylibSP> JDs) {
for (auto &KV : llvm::reverse(Result.back()->LinkOrder)) {
auto &JD = *KV.first;
- if (Visited.count(&JD))
+ if (!Visited.insert(&JD).second)
continue;
- Visited.insert(&JD);
WorkStack.push_back(&JD);
}
}
diff --git a/llvm/lib/IR/AsmWriter.cpp b/llvm/lib/IR/AsmWriter.cpp
index e680927d34066..7bed905000459 100644
--- a/llvm/lib/IR/AsmWriter.cpp
+++ b/llvm/lib/IR/AsmWriter.cpp
@@ -4725,9 +4725,8 @@ struct MDTreeAsmWriterContext : public AsmWriterContext {
: AsmWriterContext(TP, ST, M), Level(0U), Visited({InitMD}), MainOS(OS) {}
void onWriteMetadataAsOperand(const Metadata *MD) override {
- if (Visited.count(MD))
+ if (!Visited.insert(MD).second)
return;
- Visited.insert(MD);
std::string Str;
raw_string_ostream SS(Str);
diff --git a/llvm/lib/Target/ARM/MVELaneInterleavingPass.cpp b/llvm/lib/Target/ARM/MVELaneInterleavingPass.cpp
index c0355ba8587d4..3e76efb5133ff 100644
--- a/llvm/lib/Target/ARM/MVELaneInterleavingPass.cpp
+++ b/llvm/lib/Target/ARM/MVELaneInterleavingPass.cpp
@@ -177,9 +177,8 @@ static bool tryInterleave(Instruction *Start,
// Truncs
case Instruction::Trunc:
case Instruction::FPTrunc:
- if (Truncs.count(I))
+ if (!Truncs.insert(I))
continue;
- Truncs.insert(I);
Visited.insert(I);
break;
@@ -236,9 +235,8 @@ static bool tryInterleave(Instruction *Start,
case Instruction::FAdd:
case Instruction::FMul:
case Instruction::Select:
- if (Ops.count(I))
+ if (!Ops.insert(I))
continue;
- Ops.insert(I);
for (Use &Op : I->operands()) {
if (!isa<FixedVectorType>(Op->getType()))
diff --git a/llvm/lib/Target/Hexagon/BitTracker.cpp b/llvm/lib/Target/Hexagon/BitTracker.cpp
index 17adf32750db6..4d5789a3c5fe1 100644
--- a/llvm/lib/Target/Hexagon/BitTracker.cpp
+++ b/llvm/lib/Target/Hexagon/BitTracker.cpp
@@ -1056,9 +1056,8 @@ void BT::runEdgeQueue(BitVector &BlockScanned) {
CFGEdge Edge = FlowQ.front();
FlowQ.pop();
- if (EdgeExec.count(Edge))
+ if (!EdgeExec.insert(Edge).second)
return;
- EdgeExec.insert(Edge);
ReachedBB.insert(Edge.second);
const MachineBasicBlock &B = *MF.getBlockNumbered(Edge.second);
diff --git a/llvm/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp b/llvm/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp
index 6ef358d2276c3..068b0090589ef 100644
--- a/llvm/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp
@@ -1152,9 +1152,8 @@ bool PolynomialMultiplyRecognize::findCycle(Value *Out, Value *In,
if (IsPhi && HadPhi)
return false;
HadPhi |= IsPhi;
- if (Cycle.count(I))
+ if (!Cycle.insert(I))
return false;
- Cycle.insert(I);
if (findCycle(I, In, Cycle))
break;
Cycle.remove(I);
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp
index d3b6941c39378..d16bb6b6648a2 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp
@@ -73,9 +73,8 @@ WebAssemblyLateEHPrepare::getMatchingEHPad(MachineInstr *MI) {
MachineBasicBlock *EHPad = nullptr;
while (!WL.empty()) {
MachineBasicBlock *MBB = WL.pop_back_val();
- if (Visited.count(MBB))
+ if (!Visited.insert(MBB).second)
continue;
- Visited.insert(MBB);
if (MBB->isEHPad()) {
if (EHPad && EHPad != MBB)
return nullptr;
diff --git a/llvm/lib/Transforms/Scalar/NewGVN.cpp b/llvm/lib/Transforms/Scalar/NewGVN.cpp
index b0004337bb27c..6d1f09f5166d5 100644
--- a/llvm/lib/Transforms/Scalar/NewGVN.cpp
+++ b/llvm/lib/Transforms/Scalar/NewGVN.cpp
@@ -3140,9 +3140,8 @@ bool NewGVN::singleReachablePHIPath(
// connected component finding in this routine, and it's probably not worth
// the complexity for the time being. So, we just keep a set of visited
// MemoryAccess and return true when we hit a cycle.
- if (Visited.count(First))
+ if (!Visited.insert(First).second)
return true;
- Visited.insert(First);
const auto *EndDef = First;
for (auto *ChainDef : optimized_def_chain(First)) {
diff --git a/llvm/utils/TableGen/RegisterBankEmitter.cpp b/llvm/utils/TableGen/RegisterBankEmitter.cpp
index 2cc8c0f548b2d..e6689b211a7d3 100644
--- a/llvm/utils/TableGen/RegisterBankEmitter.cpp
+++ b/llvm/utils/TableGen/RegisterBankEmitter.cpp
@@ -172,9 +172,8 @@ static void visitRegisterBankClasses(
SmallPtrSetImpl<const CodeGenRegisterClass *> &VisitedRCs) {
// Make sure we only visit each class once to avoid infinite loops.
- if (VisitedRCs.count(RC))
+ if (!VisitedRCs.insert(RC).second)
return;
- VisitedRCs.insert(RC);
// Visit each explicitly named class.
VisitFn(RC, Kind.str());
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