[PATCH] D127645: [docs] Adding table of object file formats
Chris Bieneman via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 17 11:40:09 PDT 2022
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGd5745d0015ac: [docs] Adding table of object file formats (authored by beanz).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D127645/new/
https://reviews.llvm.org/D127645
Files:
llvm/docs/CodeGenerator.rst
Index: llvm/docs/CodeGenerator.rst
===================================================================
--- llvm/docs/CodeGenerator.rst
+++ llvm/docs/CodeGenerator.rst
@@ -702,6 +702,37 @@
layer. It is the type used by the instruction encoder, the instruction printer,
and the type generated by the assembly parser and disassembler.
+.. _ObjectFormats:
+
+Object File Format
+------------------
+
+The MC layer's object writers support a variety of object formats. Because of
+target-specific aspects of object formats each target only supports a subset of
+the formats supported by the MC layer. Most targets support emitting ELF
+objects. Other vendor-specific objects are generally supported only on targets
+that are supported by that vendor (i.e. MachO is only supported on targets
+supported by Darwin, and XCOFF is only supported on targets that support AIX).
+Additionally some targets have their own object formats (i.e. DirectX, SPIR-V
+and WebAssembly).
+
+The table below captures a snapshot of object file support in LLVM:
+
+ .. table:: Object File Formats
+
+ ================== ========================================================
+ Format Supported Targets
+ ================== ========================================================
+ ``COFF`` AArch64, ARM, X86
+ ``DXContainer`` DirectX
+ ``ELF`` AArch64, AMDGPU, ARM, AVR, BPF, CSKY, Hexagon, Lanai, LoongArch, M86k, MSP430, MIPS, PowerPC, RISCV, SPARC, SystemZ, VE, X86
+ ``GCOFF`` SystemZ
+ ``MachO`` AArch64, ARM, X86
+ ``SPIR-V`` SPIRV
+ ``WASM`` WebAssembly
+ ``XCOFF`` PowerPC
+ ================== ========================================================
+
.. _Target-independent algorithms:
.. _code generation algorithm:
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