[PATCH] D127756: [AMDGPU] gfx11 VINTERP intrinsics and ISel support
Joe Nash via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 17 10:00:14 PDT 2022
Joe_Nash added inline comments.
================
Comment at: llvm/include/llvm/IR/IntrinsicsAMDGPU.td:1508
+// __int_amdgcn_interp_inreg_p10 <p>, <i>, <p0>
+def int_amdgcn_interp_inreg_p10 :
----------------
foad wrote:
> The __int_* prefix doesn't make much sense. I would suggest either using the tablegen name (int_amdgcn_interp_inreg_p10) or preferably the LLVM IR name (llvm.amdgcn.interp.inreg.p10).
Done, see
75378d432fda5408b7210fd3627db884561db650
================
Comment at: llvm/include/llvm/IR/IntrinsicsAMDGPU.td:1478
+// __builtin_amdgcn_interp_inreg_p10 <p>, <i>, <p0>
+def int_amdgcn_interp_inreg_p10 :
----------------
rampitec wrote:
> Are you going to submit these builtins separately?
> Are you going to submit these builtins separately?
I will remove the builtin and it can be added later if needed.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D127756/new/
https://reviews.llvm.org/D127756
More information about the llvm-commits
mailing list