[PATCH] D128006: [RISCV] Avoid changing etype for splat of 0 or -1

Philip Reames via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jun 17 08:07:04 PDT 2022


reames added inline comments.


================
Comment at: llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extload-truncstore.ll:10
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    vsetivli zero, 2, e8, mf8, ta, mu
 ; CHECK-NEXT:    vlm.v v0, (a0)
----------------
craig.topper wrote:
> Seems like this could be e16, mf4 to avoid the later vsetvli
We don't have any demanded rules for vlm.v, and as such, can't rewrite the vsetvli before it.

I went and glanced at the spec for that instruction, and honestly, the wording is vague enough I'm not quite sure what we're allowed to do with it.  


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D128006/new/

https://reviews.llvm.org/D128006



More information about the llvm-commits mailing list