[PATCH] D128062: [PowerPC] Fix PPCVSXSwapRemoval pass to include MTVSCR and MFVSCR as not swappable.
Quinn Pham via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 17 07:47:05 PDT 2022
quinnp created this revision.
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This patch adds the instructions `MTVSCR` and `MFVSCR` as not swappable to the
PPCVSXSwapRemoval pass because they are not lane-insensitive. This will prevent
the compiler from optimizing out required swaps when using `lxvd2x` and
`stxvd2x`.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D128062
Files:
llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp
llvm/test/CodeGen/PowerPC/mtvsrc-mfvscr-PPCVSXSwapRemoval.ll
Index: llvm/test/CodeGen/PowerPC/mtvsrc-mfvscr-PPCVSXSwapRemoval.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/mtvsrc-mfvscr-PPCVSXSwapRemoval.ll
@@ -0,0 +1,37 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown \
+; RUN: -mcpu=pwr8 -O2 < %s | FileCheck %s
+
+define void @test_mtvscr() {
+; CHECK-LABEL: test_mtvscr:
+; CHECK: # %bb.0: # %test_mtvscr_entry
+; CHECK-NEXT: addi 3, 1, -16
+; CHECK-NEXT: lxvd2x 0, 0, 3
+; CHECK-NEXT: xxswapd 34, 0
+; CHECK-NEXT: mtvscr 2
+; CHECK-NEXT: blr
+test_mtvscr_entry:
+ %0 = alloca <4 x i32>
+ %1 = load <4 x i32>, <4 x i32>* %0
+ call void @llvm.ppc.altivec.mtvscr(<4 x i32> %1)
+ ret void
+}
+
+define void @test_mfvscr() {
+; CHECK-LABEL: test_mfvscr:
+; CHECK: # %bb.0: # %test_mfvscr_entry
+; CHECK-NEXT: mfvscr 2
+; CHECK-NEXT: addi 3, 1, -16
+; CHECK-NEXT: xxswapd 0, 34
+; CHECK-NEXT: stxvd2x 0, 0, 3
+; CHECK-NEXT: blr
+test_mfvscr_entry:
+ %0 = alloca <8 x i16>
+ %1 = call <8 x i16> @llvm.ppc.altivec.mfvscr()
+ store <8 x i16> %1, <8 x i16>* %0
+ ret void
+}
+
+declare void @llvm.ppc.altivec.mtvscr(<4 x i32>)
+
+declare <8 x i16> @llvm.ppc.altivec.mfvscr()
Index: llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp
===================================================================
--- llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp
+++ llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp
@@ -519,6 +519,8 @@
case PPC::XXSLDWI:
case PPC::XSCVDPSPN:
case PPC::XSCVSPDPN:
+ case PPC::MTVSCR:
+ case PPC::MFVSCR:
break;
}
}
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