[PATCH] D128006: [RISCV] Avoid changing etype for splat of 0 or -1

[Craig Topper via Phabricator via llvm-commits]

craig.topper accepted this revision.
craig.topper added a comment.
This revision is now accepted and ready to land.

LGTM with one stray formatting change and one possible future improvment.



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Comment at: llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp:609
 
+
   // Determine whether the vector instructions requirements represented by
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Stray blank line change?


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Comment at: llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extload-truncstore.ll:10
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    vsetivli zero, 2, e8, mf8, ta, mu
 ; CHECK-NEXT:    vlm.v v0, (a0)
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Seems like this could be e16, mf4 to avoid the later vsetvli


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  https://reviews.llvm.org/D128006/new/

https://reviews.llvm.org/D128006