[PATCH] D127680: [BasicTTI] Allow generic handling of scalable vector fshr/fshl

Philip Reames via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jun 16 10:52:55 PDT 2022


reames updated this revision to Diff 437603.
reames added a comment.
Herald added a subscriber: hiraditya.

Rebase and add AArch64 target code to avoid change in cost modelling.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D127680/new/

https://reviews.llvm.org/D127680

Files:
  llvm/include/llvm/CodeGen/BasicTTIImpl.h
  llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
  llvm/test/Analysis/CostModel/RISCV/rvv-intrinsics.ll


Index: llvm/test/Analysis/CostModel/RISCV/rvv-intrinsics.ll
===================================================================
--- llvm/test/Analysis/CostModel/RISCV/rvv-intrinsics.ll
+++ llvm/test/Analysis/CostModel/RISCV/rvv-intrinsics.ll
@@ -33,7 +33,7 @@
 
 define void @fshr(<vscale x 1 x i32> %a, <vscale x 1 x i32> %b, <vscale x 1 x i32> %c) {
 ; CHECK-LABEL: 'fshr'
-; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %1 = call <vscale x 1 x i32> @llvm.fshr.nxv1i32(<vscale x 1 x i32> %a, <vscale x 1 x i32> %b, <vscale x 1 x i32> %c)
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %1 = call <vscale x 1 x i32> @llvm.fshr.nxv1i32(<vscale x 1 x i32> %a, <vscale x 1 x i32> %b, <vscale x 1 x i32> %c)
 ; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
 ;
   call <vscale x 1 x i32> @llvm.fshr.nxv4i32(<vscale x 1 x i32> %a, <vscale x 1 x i32> %b, <vscale x 1 x i32> %c)
@@ -42,7 +42,7 @@
 
 define void @fshl(<vscale x 1 x i32> %a, <vscale x 1 x i32> %b, <vscale x 1 x i32> %c) {
 ; CHECK-LABEL: 'fshl'
-; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %1 = call <vscale x 1 x i32> @llvm.fshl.nxv1i32(<vscale x 1 x i32> %a, <vscale x 1 x i32> %b, <vscale x 1 x i32> %c)
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 7 for instruction: %1 = call <vscale x 1 x i32> @llvm.fshl.nxv1i32(<vscale x 1 x i32> %a, <vscale x 1 x i32> %b, <vscale x 1 x i32> %c)
 ; CHECK-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: ret void
 ;
   call <vscale x 1 x i32> @llvm.fshl.nxv4i32(<vscale x 1 x i32> %a, <vscale x 1 x i32> %b, <vscale x 1 x i32> %c)
Index: llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+++ llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
@@ -420,6 +420,12 @@
     }
     break;
   }
+  case Intrinsic::fshl:
+  case Intrinsic::fshr:
+    // Match legacy behavior - this is probably not the right costing here
+    if (isa<ScalableVectorType>(RetTy))
+      return 1;
+    break;
   default:
     break;
   }
Index: llvm/include/llvm/CodeGen/BasicTTIImpl.h
===================================================================
--- llvm/include/llvm/CodeGen/BasicTTIImpl.h
+++ llvm/include/llvm/CodeGen/BasicTTIImpl.h
@@ -1500,8 +1500,6 @@
     }
     case Intrinsic::fshl:
     case Intrinsic::fshr: {
-      if (isa<ScalableVectorType>(RetTy))
-        return BaseT::getIntrinsicInstrCost(ICA, CostKind);
       const Value *X = Args[0];
       const Value *Y = Args[1];
       const Value *Z = Args[2];


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