[PATCH] D127837: [AMDGPU] GFX11 CodeGen support for MIMG instructions

[Jay Foad via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGc155a944fbf4: [AMDGPU] GFX11 CodeGen support for MIMG instructions (authored by foad).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D127837/new/

https://reviews.llvm.org/D127837

Files:
  llvm/include/llvm/IR/IntrinsicsAMDGPU.td
  llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
  llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
  llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
  llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
  llvm/lib/Target/AMDGPU/SIISelLowering.cpp
  llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.sample.a16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.atomic.dim.a16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.atomic.dim.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.a16.dim.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.dim.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.getresinfo.a16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.getresinfo.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.d16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2d.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2darraymsaa.a16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2darraymsaa.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.a16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.cd.g16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.g16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.store.2d.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
  llvm/test/CodeGen/AMDGPU/image-load-d16-tfe.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.a16.dim.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.a16.encode.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.dim.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.d16.dim.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.a16.dim.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.d16.dim.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.dim.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.getlod.dim.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.load.a16.d16.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.load.a16.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.msaa.load.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.nsa.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.a16.dim.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.cd.a16.dim.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.cd.dim.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.cd.g16.encode.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.cd.g16.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.d16.dim.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.encode.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.store.a16.d16.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.store.a16.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
  llvm/test/CodeGen/AMDGPU/merge-image-load-gfx11.mir
  llvm/test/CodeGen/AMDGPU/merge-image-sample-gfx11.mir