[PATCH] D127946: [RISCV][NFC][test] Correct a wrong test in vreductions-fp-vp.ll

[WangLian via Phabricator via llvm-commits]

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This D117467 <https://reviews.llvm.org/D117467> patch add a wrong test to test reduce.fadd widen.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D127946

Files:
  llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp.ll


Index: llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp.ll
===================================================================
--- llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp.ll
+++ llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp.ll
@@ -315,7 +315,7 @@
   ret double %r
 }
 
-define double @vpreduce_ord_fadd_nxv3f64(double %s, <vscale x 4 x double> %v, <vscale x 4 x i1> %m, i32 zeroext %evl) {
+define double @vpreduce_ord_fadd_nxv3f64(double %s, <vscale x 3 x double> %v, <vscale x 3 x i1> %m, i32 zeroext %evl) {
 ; CHECK-LABEL: vpreduce_ord_fadd_nxv3f64:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    vsetivli zero, 1, e64, m1, ta, mu
@@ -324,11 +324,10 @@
 ; CHECK-NEXT:    vfredosum.vs v12, v8, v12, v0.t
 ; CHECK-NEXT:    vfmv.f.s fa0, v12
 ; CHECK-NEXT:    ret
-  %r = call double @llvm.vp.reduce.fadd.nxv4f64(double %s, <vscale x 4 x double> %v, <vscale x 4 x i1> %m, i32 %evl)
+  %r = call double @llvm.vp.reduce.fadd.nxv3f64(double %s, <vscale x 3 x double> %v, <vscale x 3 x i1> %m, i32 %evl)
   ret double %r
 }
 
-
 declare double @llvm.vp.reduce.fadd.nxv4f64(double, <vscale x 4 x double>, <vscale x 4 x i1>, i32)
 
 define double @vpreduce_fadd_nxv4f64(double %s, <vscale x 4 x double> %v, <vscale x 4 x i1> %m, i32 zeroext %evl) {


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