[PATCH] D127939: [LegalizeTypes][RISCV][NFC] Modify assert in PromoteIntRes_STEP_VECTOR and add some tests for RISCV

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp:5280
   EVT NOutVT = TLI.getTypeToTransformTo(*DAG.getContext(), OutVT);
-  assert(NOutVT.isVector() && "Type must be promoted to a vector type");
+  assert(NOutVT.isScalableVector() &&
+         "Type must be promoted to a scalable vector type");
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Why this change? llvm.stepvector intrinsic works for fixed vectors.


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Comment at: llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp.ll:318
 
-define double @vpreduce_ord_fadd_nxv3f64(double %s, <vscale x 4 x double> %v, <vscale x 4 x i1> %m, i32 zeroext %evl) {
+define double @vpreduce_ord_fadd_nxv3f64(double %s, <vscale x 3 x double> %v, <vscale x 3 x i1> %m, i32 zeroext %evl) {
 ; CHECK-LABEL: vpreduce_ord_fadd_nxv3f64:
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The rest of this patch involve stepvector, but this doesn't. Unless I'm missing something this should be a different patch.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D127939/new/

https://reviews.llvm.org/D127939