[llvm] 264c09b - [TableGen][DirectX] Add tableGen backend to generate map from llvm intrinsic to DXIL operation.

[Xiang Li via llvm-commits]

Author: Xiang Li
Date: 2022-06-15T19:41:09-07:00
New Revision: 264c09b732ab61936a499f133abdfc67df422a86

URL: https://github.com/llvm/llvm-project/commit/264c09b732ab61936a499f133abdfc67df422a86
DIFF: https://github.com/llvm/llvm-project/commit/264c09b732ab61936a499f133abdfc67df422a86.diff

LOG: [TableGen][DirectX] Add tableGen backend to generate map from llvm intrinsic to DXIL operation.

A new tableGen backend gen-dxil-intrinsic-map is added to generate map from llvm intrinsic to DXIL operation.

A new file "DXILIntrinsicMap.inc" will be generated when build DirectX target which include the map.

The generated map will replace the manually created map when find DXIL operation from llvm intrinsic.

Reviewed By: bogner

Differential Revision: https://reviews.llvm.org/D125519

Added: 
    

Modified: 
    llvm/lib/Target/DirectX/DXILOpLowering.cpp
    llvm/utils/TableGen/DXILEmitter.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/DirectX/DXILOpLowering.cpp b/llvm/lib/Target/DirectX/DXILOpLowering.cpp
index cfceea48134fc..6ff4ebcd9812f 100644
--- a/llvm/lib/Target/DirectX/DXILOpLowering.cpp
+++ b/llvm/lib/Target/DirectX/DXILOpLowering.cpp
@@ -64,9 +64,10 @@ static const char *getOverloadTypeName(OverloadKind Kind) {
   case OverloadKind::VOID:
   case OverloadKind::ObjectType:
   case OverloadKind::UserDefineType:
-    llvm_unreachable("invalid overload type for name");
-    return "void";
+    break;
   }
+  llvm_unreachable("invalid overload type for name");
+  return "void";
 }
 
 static OverloadKind getOverloadKind(Type *Ty) {
@@ -233,13 +234,17 @@ static void lowerIntrinsic(DXIL::OpCode DXILOp, Function &F, Module &M) {
 
 static bool lowerIntrinsics(Module &M) {
   bool Updated = false;
-  static SmallDenseMap<Intrinsic::ID, DXIL::OpCode> LowerMap = {
-      {Intrinsic::sin, DXIL::OpCode::Sin},
-      {Intrinsic::umax, DXIL::OpCode::UMax}};
+
+#define DXIL_OP_INTRINSIC_MAP
+#include "DXILOperation.inc"
+#undef DXIL_OP_INTRINSIC_MAP
+
   for (Function &F : make_early_inc_range(M.functions())) {
     if (!F.isDeclaration())
       continue;
     Intrinsic::ID ID = F.getIntrinsicID();
+    if (ID == Intrinsic::not_intrinsic)
+      continue;
     auto LowerIt = LowerMap.find(ID);
     if (LowerIt == LowerMap.end())
       continue;

diff  --git a/llvm/utils/TableGen/DXILEmitter.cpp b/llvm/utils/TableGen/DXILEmitter.cpp
index 540a73e85a20d..0a6bd2c892830 100644
--- a/llvm/utils/TableGen/DXILEmitter.cpp
+++ b/llvm/utils/TableGen/DXILEmitter.cpp
@@ -59,8 +59,10 @@ struct DXILOperationData {
   SmallVector<DXILParam> Params; // the operands that this instruction takes
   StringRef OverloadTypes;       // overload types if applicable
   StringRef FnAttr;              // attribute shorthands: rn=does not access
-                                 // memory,ro=only reads from memory,
-  bool IsDeriv;                  // whether this is some kind of derivative
+                                 // memory,ro=only reads from memory
+  StringRef Intrinsic; // The llvm intrinsic map to DXILOp. Default is "" which
+                       // means no map exist
+  bool IsDeriv;        // whether this is some kind of derivative
   bool IsGradient;               // whether this requires a gradient calculation
   bool IsFeedback;               // whether this is a sampler feedback op
   bool IsWave; // whether this requires in-wave, cross-lane functionality
@@ -79,7 +81,16 @@ struct DXILOperationData {
     DXILClass = R->getValueAsDef("op_class")->getValueAsString("name");
     Category = R->getValueAsDef("category")->getValueAsString("name");
 
+    if (R->getValue("llvm_intrinsic")) {
+      auto *IntrinsicDef = R->getValueAsDef("llvm_intrinsic");
+      auto DefName = IntrinsicDef->getName();
+      assert(DefName.startswith("int_") && "invalid intrinsic name");
+      // Remove the int_ from intrinsic name.
+      Intrinsic = DefName.substr(4);
+    }
+
     Doc = R->getValueAsString("doc");
+
     ListInit *ParamList = R->getValueAsListInit("ops");
     for (unsigned i = 0; i < ParamList->size(); ++i) {
       Record *Param = ParamList->getElementAsRecord(i);
@@ -179,6 +190,24 @@ static void emitDXILEnums(std::vector<DXILOperationData> &DXILOps,
   OS << "\n};\n\n";
 }
 
+// Emit map from llvm intrinsic to DXIL operation.
+static void EmitDXILIntrinsicMap(std::vector<DXILOperationData> &DXILOps,
+                                 raw_ostream &OS) {
+  OS << "\n";
+  // FIXME: use array instead of SmallDenseMap.
+  OS << "static const SmallDenseMap<Intrinsic::ID, DXIL::OpCode> LowerMap = "
+        "{\n";
+  for (auto &DXILOp : DXILOps) {
+    if (DXILOp.Intrinsic.empty())
+      continue;
+    // {Intrinsic::sin, DXIL::OpCode::Sin},
+    OS << "  { Intrinsic::" << DXILOp.Intrinsic
+       << ", DXIL::OpCode::" << DXILOp.DXILOp << "},\n";
+  }
+  OS << "};\n";
+  OS << "\n";
+}
+
 namespace llvm {
 
 void EmitDXILOperation(RecordKeeper &Records, raw_ostream &OS) {
@@ -196,6 +225,11 @@ void EmitDXILOperation(RecordKeeper &Records, raw_ostream &OS) {
   emitDXILEnums(DXILOps, OS);
   OS << "#endif\n\n";
 
+  OS << "#ifdef DXIL_OP_INTRINSIC_MAP\n";
+  EmitDXILIntrinsicMap(DXILOps, OS);
+  OS << "#endif\n\n";
+
+
   OS << "\n";
 }