[PATCH] D127880: [RISCV] Avoid reducing etype just to initialize lane 0 of an undef vector
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 15 17:02:38 PDT 2022
craig.topper accepted this revision.
craig.topper added a comment.
This revision is now accepted and ready to land.
LGTM other than the comment about elideCopies.
================
Comment at: llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp:935
+ (CurInfo.hasZeroAVL() && Require.hasZeroAVL()))) {
+ auto *VRegDef = MRI->getVRegDef(MI.getOperand(1).getReg());
+ if (VRegDef && VRegDef->isImplicitDef() &&
----------------
I wonder if we should call elideCopies here like we do when we look for implicit def for tail policy.
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rG LLVM Github Monorepo
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https://reviews.llvm.org/D127880/new/
https://reviews.llvm.org/D127880
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