[PATCH] D127869: [AMDGPU] Change use null for dead sdst to be gfx1030+

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp:695
 bool SIShrinkInstructions::tryReplaceDeadSDST(MachineInstr &MI) const {
-  if (ST->getGeneration() < AMDGPUSubtarget::GFX10)
+  if (!ST->hasGFX10_3Insts())
     return false;
----------------
This should be allowed on gfx11 as well, I suppose. I.e. we may need a new subtarget function if null can be used as an sdst and alike.


================
Comment at: llvm/test/CodeGen/AMDGPU/carryout-selection.ll:55
 ; GFX1010: v_add_co_u32 v{{[0-9]+}}, [[CARRY:s[0-9]+]], s{{[0-9]+}}, v{{[0-9]+}}
-; GFX1010: v_add_co_ci_u32_e64 v{{[0-9]+}}, null, s{{[0-9]+}}, 0, [[CARRY]]
+; GFX1010: v_add_co_ci_u32_e64 v{{[0-9]+}}, [[CARRY]], s{{[0-9]+}}, 0, [[CARRY]]
 define amdgpu_kernel void @vadd64rr(i64 addrspace(1)* %out, i64 %a) {
----------------
Add separate run lines for gfx1030 with wave32 and wave64?


================
Comment at: llvm/test/CodeGen/AMDGPU/mad_u64_u32.ll:3
 ; RUN: llc -march=amdgcn -mcpu=gfx900 --verify-machineinstrs < %s | FileCheck --check-prefixes=GCN,GFX9 %s
 ; RUN: llc -march=amdgcn -mcpu=gfx1010 --verify-machineinstrs < %s | FileCheck --check-prefixes=GCN,GFX10 %s
 ; RUN: llc -march=amdgcn -mcpu=gfx1100 --verify-machineinstrs < %s | FileCheck --check-prefixes=GCN,GFX11 %s
----------------
Change gfx1010 lines to gfx1030 maybe?


================
Comment at: llvm/test/CodeGen/AMDGPU/mad_u64_u32.ll:18
 ; GFX11-NEXT:    v_mov_b32_e32 v4, v0
 ; GFX11-NEXT:    v_mad_u64_u32 v[0:1], null, v4, v3, v[2:3]
 ; GFX11-NEXT:    ; return to shader part epilog
----------------
This is strange, I do not see FeatureGFX10_3Insts listed for gfx11.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D127869/new/

https://reviews.llvm.org/D127869