[PATCH] D127847: [AMDGPU][MC][GFX11] Correct src0 for dpp and dpp8 variants of v_cvt_*_e64

[Dmitry Preobrazhensky via Phabricator via llvm-commits]

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Some of these opcodes accept SGPRs as src0 which is incorrect. See bug 56036 <https://github.com/llvm/llvm-project/issues/56036>.


https://reviews.llvm.org/D127847

Files:
  llvm/lib/Target/AMDGPU/VOP1Instructions.td
  llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s
  llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8.s
  llvm/test/MC/AMDGPU/gfx11_err.s
  llvm/test/MC/Disassembler/AMDGPU/gfx11_asm_vop3_dpp16.txt
  llvm/test/MC/Disassembler/AMDGPU/gfx11_asm_vop3_dpp8.txt

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