[llvm] 4bba821 - [AMDGPU] Fix buildbot failures after 48ebc1af29

Austin Kerbow via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 15 00:30:43 PDT 2022


Author: Austin Kerbow
Date: 2022-06-15T00:23:30-07:00
New Revision: 4bba82116a1c3e3a4a723d0b175055ae58d3176f

URL: https://github.com/llvm/llvm-project/commit/4bba82116a1c3e3a4a723d0b175055ae58d3176f
DIFF: https://github.com/llvm/llvm-project/commit/4bba82116a1c3e3a4a723d0b175055ae58d3176f.diff

LOG: [AMDGPU] Fix buildbot failures after 48ebc1af29

Some buildbots (lto, windows) were failing due to some function reference
variables being improperly initialized.

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp b/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
index 2b4ce7a2e7ba..be1ab5ae5128 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
@@ -269,10 +269,10 @@ void IGroupLPDAGMutation::apply(ScheduleDAGInstrs *DAGInstrs) {
   // present ordering, we will try to make each VMEMRead instruction
   // a predecessor of each DSRead instruction, and so on.
   SmallVector<SchedGroup, 4> PipelineOrderGroups = {
-      SchedGroup(&isVMEMSGMember, VMEMGroupMaxSize, DAG),
-      SchedGroup(&isDSReadSGMember, LDRGroupMaxSize, DAG),
-      SchedGroup(&isMFMASGMember, MFMAGroupMaxSize, DAG),
-      SchedGroup(&isDSWriteSGMember, LDWGroupMaxSize, DAG)};
+      SchedGroup(isVMEMSGMember, VMEMGroupMaxSize, DAG),
+      SchedGroup(isDSReadSGMember, LDRGroupMaxSize, DAG),
+      SchedGroup(isMFMASGMember, MFMAGroupMaxSize, DAG),
+      SchedGroup(isDSWriteSGMember, LDWGroupMaxSize, DAG)};
 
   for (SUnit &SU : DAG->SUnits) {
     LLVM_DEBUG(dbgs() << "Checking Node"; DAG->dumpNode(SU));


        


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