[PATCH] D127824: [llvm-objdump] Default to --mcpu=future for PPC64

Fangrui Song via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 14 22:47:05 PDT 2022


MaskRay created this revision.
MaskRay added reviewers: PowerPC, jhenderson, jsji, nemanjai, stefanp.
Herald added subscribers: StephenFan, steven.zhang, shchenz, rupprecht, kbarton, hiraditya, emaste.
Herald added a project: All.
MaskRay requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

It's user friendly if a disassembler supports most target features and
tries to disassemble all instructions by default.
Since PowerPC has a `future` which intends to support all non-conflicting
features, it seems wise to default to it.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D127824

Files:
  llvm/lib/Object/ELFObjectFile.cpp
  llvm/test/MC/PowerPC/ppc64-prefix-align-labels.s
  llvm/test/MC/PowerPC/ppc64-prefix-align.s
  llvm/test/tools/llvm-objdump/ELF/PowerPC/mcpu.s


Index: llvm/test/tools/llvm-objdump/ELF/PowerPC/mcpu.s
===================================================================
--- /dev/null
+++ llvm/test/tools/llvm-objdump/ELF/PowerPC/mcpu.s
@@ -0,0 +1,12 @@
+## Test that we default to --mcpu=future and disassemble all known instructions.
+## The default is different from producers (e.g. Clang).
+# RUN: llvm-mc -triple=powerpc64le -filetype=obj %s -o %t
+# RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s --check-prefixes=CHECK,FUTURE
+# RUN: llvm-objdump -d --no-show-raw-insn --mcpu=future %t | FileCheck %s --check-prefixes=CHECK,FUTURE
+# RUN: llvm-objdump -d --no-show-raw-insn --mcpu=pwr9 %t | FileCheck %s --check-prefixes=CHECK,OLD
+
+# CHECK:        <.text>:
+# FUTURE-NEXT:    pld 3, 0(0), 1
+# OLD-NEXT:       <unknown>
+
+pld 3, 0(0), 1
Index: llvm/test/MC/PowerPC/ppc64-prefix-align.s
===================================================================
--- llvm/test/MC/PowerPC/ppc64-prefix-align.s
+++ llvm/test/MC/PowerPC/ppc64-prefix-align.s
@@ -29,12 +29,10 @@
 # instruction can start at 40: which is 64 bytes aligned.
 # CHECK-BE:      38:	38 43 00 0f
 # CHECK-BE-NEXT: 3c:	60 00 00 00 	nop
-# CHECK-BE-NEXT: 40:	06 01 ff ff
-# CHECK-BE-NEXT: 44:	38 22 ff f0
+# CHECK-BE-NEXT: 40:	06 01 ff ff 38 22 ff f0  paddi 1, 2, 8589934576, 0
 # CHECK-LE:      38:	0f 00 43 38
 # CHECK-LE-NEXT: 3c:	00 00 00 60 	nop
-# CHECK-LE-NEXT: 40:	ff ff 01 06
-# CHECK-LE-NEXT: 44:	f0 ff 22 38
+# CHECK-LE-NEXT: 40:	ff ff 01 06 f0 ff 22 38  paddi 1, 2, 8589934576, 0
 paddi 1, 2, 8589934576, 0
 paddi 1, 2, 8589934576, 0
 paddi 1, 2, 8589934576, 0
@@ -54,13 +52,11 @@
 # CHECK-BE:      b8:	38 43 00 0f
 # CHECK-BE-NEXT: bc:	60 00 00 00 	nop
 # CHECK-BE:      <LAB1>:
-# CHECK-BE-NEXT: c0:	06 01 ff ff
-# CHECK-BE-NEXT: c4:	38 22 ff f0
+# CHECK-BE-NEXT: c0:	06 01 ff ff 38 22 ff f0  paddi 1, 2, 8589934576, 0
 # CHECK-LE:      b8:	0f 00 43 38
 # CHECK-LE-NEXT: bc:	00 00 00 60 	nop
 # CHECK-LE:      <LAB1>:
-# CHECK-LE-NEXT: c0:	ff ff 01 06
-# CHECK-LE-NEXT: c4:	f0 ff 22 38
+# CHECK-LE-NEXT: c0:	ff ff 01 06 f0 ff 22 38  paddi 1, 2, 8589934576, 0
 LAB1: paddi 1, 2, 8589934576, 0
 paddi 1, 2, 8589934576, 0
 paddi 1, 2, 8589934576, 0
@@ -72,13 +68,11 @@
 # CHECK-BE:      f8:	38 43 00 0f
 # CHECK-BE:      <LAB2>:
 # CHECK-BE-NEXT: fc:	60 00 00 00 	nop
-# CHECK-BE-NEXT: 100:	06 01 ff ff
-# CHECK-BE-NEXT: 104:	38 22 ff f0
+# CHECK-BE-NEXT: 100:	06 01 ff ff 38 22 ff f0  paddi 1, 2, 8589934576, 0
 # CHECK-LE:      f8:	0f 00 43 38
 # CHECK-LE:      <LAB2>:
 # CHECK-LE-NEXT: fc:	00 00 00 60 	nop
-# CHECK-LE-NEXT: 100:	ff ff 01 06
-# CHECK-LE-NEXT: 104:	f0 ff 22 38
+# CHECK-LE-NEXT: 100:	ff ff 01 06 f0 ff 22 38  paddi 1, 2, 8589934576, 0
 LAB2:
   paddi 1, 2, 8589934576, 0
 
Index: llvm/test/MC/PowerPC/ppc64-prefix-align-labels.s
===================================================================
--- llvm/test/MC/PowerPC/ppc64-prefix-align-labels.s
+++ llvm/test/MC/PowerPC/ppc64-prefix-align-labels.s
@@ -38,11 +38,9 @@
 3:
 	blr
 # CHECK-BE:      3c:       60 00 00 00     nop
-# CHECK-BE-NEXT: 40:       06 01 ff ff
-# CHECK-BE-NEXT: 44:       38 22 ff f0
+# CHECK-BE-NEXT: 40:       06 01 ff ff 38 22 ff f0 paddi 1, 2, 8589934576, 0
 # CHECK-BE-NEXT: 48:       4e 80 00 20
 # CHECK-LE:      3c:       00 00 00 60     nop
-# CHECK-LE-NEXT: 40:       ff ff 01 06
-# CHECK-LE-NEXT: 44:       f0 ff 22 38
+# CHECK-LE-NEXT: 40:       ff ff 01 06 f0 ff 22 38 paddi 1, 2, 8589934576, 0
 # CHECK-LE-NEXT: 48:       20 00 80 4e
 
Index: llvm/lib/Object/ELFObjectFile.cpp
===================================================================
--- llvm/lib/Object/ELFObjectFile.cpp
+++ llvm/lib/Object/ELFObjectFile.cpp
@@ -358,6 +358,8 @@
   switch (getEMachine()) {
   case ELF::EM_AMDGPU:
     return getAMDGPUCPUName();
+  case ELF::EM_PPC64:
+    return StringRef("future");
   default:
     return None;
   }


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D127824.437037.patch
Type: text/x-patch
Size: 3871 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20220615/d3acf8d0/attachment.bin>


More information about the llvm-commits mailing list