[PATCH] D126807: [PowerPC] Fix LQ-STQ instructions to use correct offset and base
Ahsan Saghir via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 14 14:54:39 PDT 2022
saghir added a comment.
In D126807#3581621 <https://reviews.llvm.org/D126807#3581621>, @lkail wrote:
> This fix looks making offset handling more complex. We can make it easier by add `LQX_PSEUDO` and `STQX_PSEUDO` to `ImmToIdxMap`.
>
> ImmToIdxMap[PPC::LQ] = PPC::LQX_PSEUDO;
> ImmToIdxMap[PPC::STQ] = PPC::STQX_PSEUDO;
>
> And expand `PPC::LQX_PSEUDO` and `PPC::STQX_PSEUDO` post RA(They are expanded in `PPCTargetLowering::EmitInstrWithCustomInserter` right now). Something like
>
> $x6 = LQX_PSEUDO $x0, $x1
> =>
> $x3 = ADD $x0, $x1
> $x6 = LQ 0($x3)
>
> Thus we make `LQ/STQ` fits in how we are handling frame index now, no more code is needed to handling the offset for `LQ/STQ`(When `LQ/STQ` are selected by ISEL, alignment is guaranteed to be 16 bytes since they are for atomic operations).
Thanks for the suggestion. Adding `LQX_PSEUDO` and `STQX_PSEUDO` to `ImmToIdxMap` fixes both cases:
- Offset fits in the instruction
- Offset does not fit in the instruction
I have taken out the test case for the unaligned case since alignment is guaranteed to be 16 bytes for atomic operations.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D126807/new/
https://reviews.llvm.org/D126807
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