[PATCH] D127772: [DAG] Fix SDLoc mismatch in (shl (srl x, c1), c2) -> and(shift(x,c3)) fold

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon created this revision.
RKSimon added reviewers: craig.topper, spatel.
Herald added subscribers: jsji, kosarev, StephenFan, ecnelises, kerbowa, pengfei, hiraditya, jvesely.
Herald added a project: All.
RKSimon requested review of this revision.
Herald added a project: LLVM.

Noticed by @craig.topper on D125836 <https://reviews.llvm.org/D125836> which uses a tweaked copy of the same code.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D127772

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/test/CodeGen/AMDGPU/copy-illegal-type.ll
  llvm/test/CodeGen/AMDGPU/load-lo16.ll
  llvm/test/CodeGen/AMDGPU/shl.v2i16.ll
  llvm/test/CodeGen/X86/2009-05-30-ISelBug.ll
  llvm/test/CodeGen/X86/combine-shl.ll
  llvm/test/CodeGen/X86/rotate-extract.ll
  llvm/test/CodeGen/X86/shift-mask.ll
  llvm/test/CodeGen/X86/sse2-vector-shifts.ll

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