[PATCH] D127527: [AMDGPU] Define SGPR_NULL64 register. NFCI.

Stanislav Mekhanoshin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 14 11:04:22 PDT 2022


rampitec added a comment.

In D127527#3581503 <https://reviews.llvm.org/D127527#3581503>, @Joe_Nash wrote:

> Ok, thanks! It seems we have many ways to optimize instructions with zero operands, so the use of the null sgpr is quite specific.

Right. The problem with null being used in place of a vcc as a carry in particular that it prevents shrinking. And a for a normal vsrc we can do better with inline literals.


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