[PATCH] D127210: [AArch64][SME] Add load/store intrinsics

[Rosie Sumpter via Phabricator via llvm-commits]

RosieSumpter added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64RegisterInfo.td:1218
   let Size = 2048;
+  let isAllocatable = 0;
 }
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aemerson wrote:
> Hoist these to the outside so you only do `let isAllocatable = 0 in {` once?
Thanks for reviewing @aemerson, I made this change before committing.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D127210/new/

https://reviews.llvm.org/D127210