[PATCH] D127708: [AArch64][NFC] Fix a comment error

[Allen zhong via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG0cb33551ecd6: [AArch64][NFC] Fix a comment error (authored by Allen).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D127708/new/

https://reviews.llvm.org/D127708

Files:
  llvm/lib/Target/AArch64/AArch64.td
  llvm/lib/Target/AArch64/AArch64MachineScheduler.cpp


Index: llvm/lib/Target/AArch64/AArch64MachineScheduler.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64MachineScheduler.cpp
+++ llvm/lib/Target/AArch64/AArch64MachineScheduler.cpp
@@ -26,7 +26,7 @@
        return false;
     LLVM_FALLTHROUGH;
   case AArch64::STPQi:
-    return AArch64InstrInfo::getLdStOffsetOp(*MI).getType() == MachineOperand::MO_Immediate;
+    return AArch64InstrInfo::getLdStOffsetOp(*MI).isImm();
   }
 
   return false;
Index: llvm/lib/Target/AArch64/AArch64.td
===================================================================
--- llvm/lib/Target/AArch64/AArch64.td
+++ llvm/lib/Target/AArch64/AArch64.td
@@ -217,7 +217,7 @@
 
 def FeatureAscendStoreAddress : SubtargetFeature<"ascend-store-address",
     "IsStoreAddressAscend", "false",
-    "Schedule scalar stores by ascending address">;
+    "Schedule vector stores by ascending address">;
 
 def FeatureSlowSTRQro : SubtargetFeature<"slow-strqro-store", "IsSTRQroSlow",
     "true", "STR of Q register with register offset is slow">;


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