[PATCH] D127527: [AMDGPU] Define SGPR_NULL64 register. NFCI.

Mon Jun 13 14:28:40 PDT 2022

rampitec added a comment.

In D127527#3579552 <https://reviews.llvm.org/D127527#3579552>, @Joe_Nash wrote:

> LGTM, but could there be more opportunities to use this? 
> Are there cases where we want to have value 0 in a source operand (a normal VSrc, not VOPDstS64orS32 like is used in https://reviews.llvm.org/D127542), it can't be folded, and we could use sgpr null 64? It might be interesting to have a test case for that with folding excluded.

0 is inline literal, so usually we can use inline 0 instead.

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https://reviews.llvm.org/D127527