[PATCH] D127210: [AArch64][SME] Add load/store intrinsics

[Amara Emerson via Phabricator via llvm-commits]

aemerson accepted this revision.
aemerson added a comment.
This revision is now accepted and ready to land.

We can revisit the opaque pointers issue later. LGTM otherwise with a nit.



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Comment at: llvm/lib/Target/AArch64/AArch64RegisterInfo.td:1218
   let Size = 2048;
+  let isAllocatable = 0;
 }
----------------
Hoist these to the outside so you only do `let isAllocatable = 0 in {` once?


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