[PATCH] D127662: [AMDGPU] Add GFX11 llvm.amdgcn.permlane64 intrinsic

[Jay Foad via Phabricator via llvm-commits]

foad created this revision.
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Compared to permlane16, permlane64 has no BC input because it has no
boundary conditions, no fi input because the instruction acts as if FI
were always enabled, and no OLD input because it always writes to every
active lane.

Also use the new intrinsic in the atomic optimizer pass.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D127662

Files:
  llvm/include/llvm/IR/IntrinsicsAMDGPU.td
  llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
  llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
  llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
  llvm/lib/Target/AMDGPU/VOP1Instructions.td
  llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane64.ll
  llvm/test/Transforms/InstCombine/AMDGPU/permlane64.ll

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