[PATCH] D126771: [fastalloc] Support allocate specific register class in fastalloc.

[LuoYuanke via Phabricator via llvm-commits]

LuoYuanke added a comment.

In D126771#3576818 <https://reviews.llvm.org/D126771#3576818>, @xiangzhangllvm wrote:

> I think the idea of "split" special registers RA pass is good (especially for the registers who need to be config).
> I notice all the "isVirtual<Register>" places need carefully to "exclude" the special registers.
> Seems we may no need to do it if we can make sure that we handle these special registers **before **normal fast RA.
> (because they have be allocated to physic registers)

Maybe there is some misunderstanding. This patch is to allow fast RA not only allocate all virtual register but also allocate specific register (e.g. tile register). Tile register is still allocated by fast RA, but it is allocated alone, not mixed with other register class. We can observe pass pipeline in O0-pipeline.ll.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D126771/new/

https://reviews.llvm.org/D126771