[llvm] 8f6512f - [X86][Disassembler] Fix displacement operand size for symbolizer

Maksim Panchenko via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 13 00:15:06 PDT 2022


Author: Maksim Panchenko
Date: 2022-06-13T00:14:43-07:00
New Revision: 8f6512fea000c3a0d394864bb94e524bee375069

URL: https://github.com/llvm/llvm-project/commit/8f6512fea000c3a0d394864bb94e524bee375069
DIFF: https://github.com/llvm/llvm-project/commit/8f6512fea000c3a0d394864bb94e524bee375069.diff

LOG: [X86][Disassembler] Fix displacement operand size for symbolizer

On 64-bit X86, 0x66 operand-size override prefix will change the size of
the instruction operand, e.g. from 32 bits to 16 bits, but it will not
modify the size of the displacement operand used for memory addressing,
which will always be 32 bits.

Reviewed By: skan, rafauler

Differential Revision: https://reviews.llvm.org/D126726

Added: 
    

Modified: 
    llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
    llvm/unittests/MC/X86/X86MCDisassemblerTest.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp b/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
index e8b9ee60233d3..1da6bf86397ec 100644
--- a/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
+++ b/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
@@ -493,16 +493,15 @@ static int readPrefixes(struct InternalInstruction *insn) {
     insn->displacementSize = (insn->hasAdSize ? 2 : 4);
     insn->immediateSize = (insn->hasOpSize ? 2 : 4);
   } else if (insn->mode == MODE_64BIT) {
+    insn->displacementSize = 4;
     if (insn->rexPrefix && wFromREX(insn->rexPrefix)) {
       insn->registerSize = 8;
       insn->addressSize = (insn->hasAdSize ? 4 : 8);
-      insn->displacementSize = 4;
       insn->immediateSize = 4;
       insn->hasOpSize = false;
     } else {
       insn->registerSize = (insn->hasOpSize ? 2 : 4);
       insn->addressSize = (insn->hasAdSize ? 4 : 8);
-      insn->displacementSize = (insn->hasOpSize ? 2 : 4);
       insn->immediateSize = (insn->hasOpSize ? 2 : 4);
     }
   }

diff  --git a/llvm/unittests/MC/X86/X86MCDisassemblerTest.cpp b/llvm/unittests/MC/X86/X86MCDisassemblerTest.cpp
index 97e717cc9b979..5ae10bb7ace7a 100644
--- a/llvm/unittests/MC/X86/X86MCDisassemblerTest.cpp
+++ b/llvm/unittests/MC/X86/X86MCDisassemblerTest.cpp
@@ -142,4 +142,10 @@ TEST(X86Disassembler, X86MCSymbolizerTest) {
   checkBytes({0x49, 0xc7, 0x04, 0x24, 0xf5, 0xfe, 0xff, 0xff});
   checkOperand(0, 0, 4, 0);
   checkOperand(1, 0xfffffffffffffef5, 4, 4);
+
+  // mov    %ax, 0x1568179(%rbx)
+  // Test that the displacement operand size is not affected by the operand
+  // size override prefix.
+  checkBytes({0x66, 0x89, 0x83, 0x79, 0x81, 0x56, 0x01});
+  checkOperand(0, 0x1568179, 3, 4);
 }


        


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