[PATCH] D124284: [SLP]Try partial store vectorization if supported by target.

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


================
Comment at: llvm/test/Transforms/SLPVectorizer/X86/arith-mul-load.ll:14
 
 define void @add4(ptr noalias nocapture noundef %r, ptr noalias nocapture noundef readonly %a) {
 ; SSE-LABEL: @add4(
----------------
xbolva00 wrote:
> xbolva00 wrote:
> > RKSimon wrote:
> > > xbolva00 wrote:
> > > > RKSimon wrote:
> > > > > ABataev wrote:
> > > > > > RKSimon wrote:
> > > > > > > I'll investigate adding 32-bit vector load/store handling as well (it has the same costs as the codegen for 64-bit anyhow).
> > > > > > TTI does not report that it supports 32 bit stores.
> > > > > We never bothered to add it - we mainly use the 64-bit vector load/store to handle f64-i64 handling on 32-bit targets
> > > > Do you plan to add them?
> > > yes - got a few other blockers to deal with first though - that yak has to be shaved.......
> > ok, thanks!
> any updates?
> 
> 
> ```
> void pr(char* __restrict a, char* __restrict r){
>     for (int i = 0; i < 4; i++){
>         r[i] += a[i];
>     }
> }
> ```
> 
> gcc emits nicely paddb.
https://reviews.llvm.org/D127604 - but I need someone to perf test the patch properly.


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  https://reviews.llvm.org/D124284/new/

https://reviews.llvm.org/D124284