[PATCH] D127549: RISCV: handle 64-bit PCREL data relocations

[Saleem Abdulrasool via Phabricator via llvm-commits]

compnerd added inline comments.


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Comment at: llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp:236
+    // Avoid relaxation for symbolic difference in debug and eh_frame sections
+    if (A.isInSection())
+      return !IsDebugOrEHFrameSection(A.getSection());
----------------
craig.topper wrote:
> compnerd wrote:
> > craig.topper wrote:
> > > Should relaxation here be relocation?
> > In the case of a compact code model, we can relax the pair of relocations to a single relocation.  You would still have a relocation, it just is a nominally smaller file, and fewer relocations for the linker to process.
> I was asking about “Avoid relaxation for symbolic differences…”. Is relaxation the right word there?
Right; I believe that is the term here - we are technically relaxing the sequence by replacing the two relocations with one.


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  https://reviews.llvm.org/D127549/new/

https://reviews.llvm.org/D127549