[PATCH] D127115: [RFC][DAGCombine] Make sure combined nodes are added back to the worklist in topological order.

[Amaury SECHET via Phabricator via llvm-commits]

deadalnix added inline comments.


================
Comment at: llvm/test/CodeGen/X86/load-partial.ll:117
+; SSE2-NEXT:    shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
+; SSE2-NEXT:    retq
+;
----------------
Before:
```
SelectionDAG has 9 nodes:
  t0: ch = EntryToken
      t2: i64,ch = CopyFromReg t0, Register:i64 %0
    t33: v4f32,ch = load<(dereferenceable load (s128) from %ir.2, align 4)> t0, t2, undef:i64
  t22: ch,glue = CopyToReg t0, Register:v4f32 $xmm0, t33
  t23: ch = X86ISD::RET_FLAG t22, TargetConstant:i32<0>, Register:v4f32 $xmm0, t22:1
```

After:
```
SelectionDAG has 19 nodes:
  t0: ch = EntryToken
  t2: i64,ch = CopyFromReg t0, Register:i64 %0
      t31: f64,ch = load<(dereferenceable load (s64) from %ir.2, align 4)> t0, t2, undef:i64
    t32: v2f64 = scalar_to_vector t31
  t33: v4f32 = bitcast t32
            t15: i64 = add nuw t2, Constant:i64<8>
          t16: f32,ch = load<(dereferenceable load (s32) from %ir.8)> t0, t15, undef:i64
        t35: v4f32 = scalar_to_vector t16
      t38: v4f32 = X86ISD::SHUFP t35, t33, TargetConstant:i8<48>
    t40: v4f32 = X86ISD::SHUFP t33, t38, TargetConstant:i8<-124>
  t22: ch,glue = CopyToReg t0, Register:v4f32 $xmm0, t40
  t23: ch = X86ISD::RET_FLAG t22, TargetConstant:i32<0>, Register:v4f32 $xmm0, t22:1
```

This is definitively serious.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D127115/new/

https://reviews.llvm.org/D127115