[llvm] 599aa61 - [PowerPC] Regenerate pre-inc-disable.ll checks

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Sat Jun 11 07:16:45 PDT 2022


Author: Simon Pilgrim
Date: 2022-06-11T15:12:49+01:00
New Revision: 599aa617e3779710e672594b85aaa38afa196a9e

URL: https://github.com/llvm/llvm-project/commit/599aa617e3779710e672594b85aaa38afa196a9e
DIFF: https://github.com/llvm/llvm-project/commit/599aa617e3779710e672594b85aaa38afa196a9e.diff

LOG: [PowerPC] Regenerate pre-inc-disable.ll checks

Added: 
    

Modified: 
    llvm/test/CodeGen/PowerPC/pre-inc-disable.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/PowerPC/pre-inc-disable.ll b/llvm/test/CodeGen/PowerPC/pre-inc-disable.ll
index d170dc7e4153..d0db193d0842 100644
--- a/llvm/test/CodeGen/PowerPC/pre-inc-disable.ll
+++ b/llvm/test/CodeGen/PowerPC/pre-inc-disable.ll
@@ -1,35 +1,116 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mcpu=pwr9 -O3 -verify-machineinstrs -ppc-vsr-nums-as-vr \
 ; RUN:     -mtriple=powerpc64le-unknown-linux-gnu \
-; RUN:     < %s | FileCheck %s
+; RUN:     < %s | FileCheck %s --check-prefixes=P9LE
 
 ; RUN: llc -mcpu=pwr9 -O3 -verify-machineinstrs -ppc-vsr-nums-as-vr \
 ; RUN:     -mtriple=powerpc64-unknown-linux-gnu \
-; RUN:     < %s | FileCheck %s --check-prefix=P9BE
+; RUN:     < %s | FileCheck %s --check-prefixes=P9BE
 
 ; RUN: llc -mcpu=pwr9 -O3 -verify-machineinstrs -ppc-vsr-nums-as-vr \
 ; RUN:     -mtriple=powerpc64-ibm-aix-xcoff -vec-extabi \
-; RUN:     < %s | FileCheck %s --check-prefix=P9BE
+; RUN:     < %s | FileCheck %s --check-prefixes=P9BE-AIX
 
 ; RUN: llc -mcpu=pwr9 -O3 -verify-machineinstrs -ppc-vsr-nums-as-vr \
 ; RUN:     -mtriple=powerpc-ibm-aix-xcoff -vec-extabi \
-; RUN:     < %s | FileCheck %s --check-prefix=P9BE-32
+; RUN:     < %s | FileCheck %s --check-prefixes=P9BE-AIX32
 
 define void @test64(i8* nocapture readonly %pix2, i32 signext %i_pix2) {
-; CHECK-LABEL: test64:
-; CHECK-NOT: ldux
-; CHECK-NOT: mtvsrd
-; CHECK: lxsdx [[REG:[0-9]+]]
-; CHECK: vperm {{[0-9]+}}, [[REG]]
+; P9LE-LABEL: test64:
+; P9LE:       # %bb.0: # %entry
+; P9LE-NEXT:    add 5, 3, 4
+; P9LE-NEXT:    lxsdx 2, 3, 4
+; P9LE-NEXT:    addis 3, 2, .LCPI0_0 at toc@ha
+; P9LE-NEXT:    xxlxor 4, 4, 4
+; P9LE-NEXT:    addi 3, 3, .LCPI0_0 at toc@l
+; P9LE-NEXT:    lxv 3, 0(3)
+; P9LE-NEXT:    addis 3, 2, .LCPI0_1 at toc@ha
+; P9LE-NEXT:    addi 3, 3, .LCPI0_1 at toc@l
+; P9LE-NEXT:    vperm 2, 2, 4, 3
+; P9LE-NEXT:    lxsd 3, 4(5)
+; P9LE-NEXT:    lxv 4, 0(3)
+; P9LE-NEXT:    vperm 3, 3, 3, 4
+; P9LE-NEXT:    vspltisw 4, 8
+; P9LE-NEXT:    vnegw 3, 3
+; P9LE-NEXT:    vadduwm 4, 4, 4
+; P9LE-NEXT:    vslw 3, 3, 4
+; P9LE-NEXT:    vsubuwm 2, 3, 2
+; P9LE-NEXT:    xxswapd 0, 2
+; P9LE-NEXT:    stxv 0, 0(3)
+; P9LE-NEXT:    blr
+;
 ; P9BE-LABEL: test64:
-; P9BE-NOT: ldux
-; P9BE-NOT: mtvsrd
-; P9BE: lxsdx [[REG:[0-9]+]]
-; P9BE: vperm {{[0-9]+}}, {{[0-9]+}}, [[REG]]
-; P9BE-32-LABEL: test64:
-; P9BE-32: lwzux [[REG1:[0-9]+]]
-; P9BE-32: mtfprwz [[REG2:[0-9]+]], [[REG1]]
-; P9BE-32: xxinsertw [[REG3:[0-9]+]], [[REG2]]
-; P9BE-32: vperm {{[0-9]+}}, {{[0-9]+}}, [[REG3]]
+; P9BE:       # %bb.0: # %entry
+; P9BE-NEXT:    add 5, 3, 4
+; P9BE-NEXT:    lxsdx 2, 3, 4
+; P9BE-NEXT:    addis 3, 2, .LCPI0_0 at toc@ha
+; P9BE-NEXT:    xxlxor 4, 4, 4
+; P9BE-NEXT:    addi 3, 3, .LCPI0_0 at toc@l
+; P9BE-NEXT:    lxv 3, 0(3)
+; P9BE-NEXT:    addis 3, 2, .LCPI0_1 at toc@ha
+; P9BE-NEXT:    addi 3, 3, .LCPI0_1 at toc@l
+; P9BE-NEXT:    vperm 2, 4, 2, 3
+; P9BE-NEXT:    lxsd 3, 4(5)
+; P9BE-NEXT:    lxv 4, 0(3)
+; P9BE-NEXT:    vperm 3, 3, 3, 4
+; P9BE-NEXT:    vspltisw 4, 8
+; P9BE-NEXT:    vnegw 3, 3
+; P9BE-NEXT:    vadduwm 4, 4, 4
+; P9BE-NEXT:    vslw 3, 3, 4
+; P9BE-NEXT:    vsubuwm 2, 3, 2
+; P9BE-NEXT:    xxswapd 0, 2
+; P9BE-NEXT:    stxv 0, 0(3)
+; P9BE-NEXT:    blr
+;
+; P9BE-AIX-LABEL: test64:
+; P9BE-AIX:       # %bb.0: # %entry
+; P9BE-AIX-NEXT:    add 5, 3, 4
+; P9BE-AIX-NEXT:    lxsdx 2, 3, 4
+; P9BE-AIX-NEXT:    ld 3, L..C0(2) # %const.0
+; P9BE-AIX-NEXT:    xxlxor 4, 4, 4
+; P9BE-AIX-NEXT:    lxv 3, 0(3)
+; P9BE-AIX-NEXT:    ld 3, L..C1(2) # %const.1
+; P9BE-AIX-NEXT:    vperm 2, 4, 2, 3
+; P9BE-AIX-NEXT:    lxsd 3, 4(5)
+; P9BE-AIX-NEXT:    lxv 4, 0(3)
+; P9BE-AIX-NEXT:    vperm 3, 3, 3, 4
+; P9BE-AIX-NEXT:    vspltisw 4, 8
+; P9BE-AIX-NEXT:    vnegw 3, 3
+; P9BE-AIX-NEXT:    vadduwm 4, 4, 4
+; P9BE-AIX-NEXT:    vslw 3, 3, 4
+; P9BE-AIX-NEXT:    vsubuwm 2, 3, 2
+; P9BE-AIX-NEXT:    xxswapd 0, 2
+; P9BE-AIX-NEXT:    stxv 0, 0(3)
+; P9BE-AIX-NEXT:    blr
+;
+; P9BE-AIX32-LABEL: test64:
+; P9BE-AIX32:       # %bb.0: # %entry
+; P9BE-AIX32-NEXT:    lwzux 4, 3, 4
+; P9BE-AIX32-NEXT:    lwz 5, L..C0(2) # %const.0
+; P9BE-AIX32-NEXT:    xxlxor 4, 4, 4
+; P9BE-AIX32-NEXT:    lxv 3, 0(5)
+; P9BE-AIX32-NEXT:    stw 4, -32(1)
+; P9BE-AIX32-NEXT:    lwz 4, 4(3)
+; P9BE-AIX32-NEXT:    lxv 2, -32(1)
+; P9BE-AIX32-NEXT:    stw 4, -16(1)
+; P9BE-AIX32-NEXT:    mtfprwz 0, 4
+; P9BE-AIX32-NEXT:    lwz 3, 8(3)
+; P9BE-AIX32-NEXT:    xxinsertw 2, 0, 4
+; P9BE-AIX32-NEXT:    mtfprwz 0, 3
+; P9BE-AIX32-NEXT:    lwz 3, L..C1(2) # %const.1
+; P9BE-AIX32-NEXT:    vperm 2, 4, 2, 3
+; P9BE-AIX32-NEXT:    lxv 3, -16(1)
+; P9BE-AIX32-NEXT:    lxv 4, 0(3)
+; P9BE-AIX32-NEXT:    xxinsertw 3, 0, 4
+; P9BE-AIX32-NEXT:    vperm 3, 3, 3, 4
+; P9BE-AIX32-NEXT:    vspltisw 4, 8
+; P9BE-AIX32-NEXT:    vnegw 3, 3
+; P9BE-AIX32-NEXT:    vadduwm 4, 4, 4
+; P9BE-AIX32-NEXT:    vslw 3, 3, 4
+; P9BE-AIX32-NEXT:    vsubuwm 2, 3, 2
+; P9BE-AIX32-NEXT:    xxswapd 0, 2
+; P9BE-AIX32-NEXT:    stxv 0, 0(3)
+; P9BE-AIX32-NEXT:    blr
 entry:
   %idx.ext63 = sext i32 %i_pix2 to i64
   %add.ptr64 = getelementptr inbounds i8, i8* %pix2, i64 %idx.ext63
@@ -55,19 +136,87 @@ entry:
 }
 
 define void @test32(i8* nocapture readonly %pix2, i32 signext %i_pix2) {
-; CHECK-LABEL: test32:
-; CHECK-NOT: lwzux
-; CHECK-NOT: mtvsrwz
-; CHECK: lxsiwzx [[REG:[0-9]+]]
-; CHECK: vperm {{[0-9]+}}, [[REG]]
+; P9LE-LABEL: test32:
+; P9LE:       # %bb.0: # %entry
+; P9LE-NEXT:    add 5, 3, 4
+; P9LE-NEXT:    lxsiwzx 2, 3, 4
+; P9LE-NEXT:    addis 3, 2, .LCPI1_0 at toc@ha
+; P9LE-NEXT:    xxlxor 3, 3, 3
+; P9LE-NEXT:    addi 3, 3, .LCPI1_0 at toc@l
+; P9LE-NEXT:    lxv 4, 0(3)
+; P9LE-NEXT:    li 3, 4
+; P9LE-NEXT:    lxsiwzx 5, 5, 3
+; P9LE-NEXT:    vperm 2, 2, 3, 4
+; P9LE-NEXT:    vperm 3, 5, 3, 4
+; P9LE-NEXT:    vspltisw 4, 8
+; P9LE-NEXT:    vnegw 3, 3
+; P9LE-NEXT:    vadduwm 4, 4, 4
+; P9LE-NEXT:    vslw 3, 3, 4
+; P9LE-NEXT:    vsubuwm 2, 3, 2
+; P9LE-NEXT:    xxswapd 0, 2
+; P9LE-NEXT:    stxv 0, 0(3)
+; P9LE-NEXT:    blr
+;
 ; P9BE-LABEL: test32:
-; P9BE-NOT: lwzux
-; P9BE-NOT: mtvsrwz
-; P9BE: lxsiwzx [[REG:[0-9]+]]
-; P9BE: vperm {{[0-9]+}}, {{[0-9]+}}, [[REG]]
-; P9BE-32-LABEL: test32:
-; P9BE-32: lxsiwzx [[REG:[0-9]+]]
-; P9BE-32: vperm {{[0-9]+}}, {{[0-9]+}}, [[REG]]
+; P9BE:       # %bb.0: # %entry
+; P9BE-NEXT:    add 5, 3, 4
+; P9BE-NEXT:    lxsiwzx 2, 3, 4
+; P9BE-NEXT:    addis 3, 2, .LCPI1_0 at toc@ha
+; P9BE-NEXT:    xxlxor 3, 3, 3
+; P9BE-NEXT:    addi 3, 3, .LCPI1_0 at toc@l
+; P9BE-NEXT:    lxv 4, 0(3)
+; P9BE-NEXT:    li 3, 4
+; P9BE-NEXT:    lxsiwzx 5, 5, 3
+; P9BE-NEXT:    vperm 2, 3, 2, 4
+; P9BE-NEXT:    vperm 3, 3, 5, 4
+; P9BE-NEXT:    vspltisw 4, 8
+; P9BE-NEXT:    vnegw 3, 3
+; P9BE-NEXT:    vadduwm 4, 4, 4
+; P9BE-NEXT:    vslw 3, 3, 4
+; P9BE-NEXT:    vsubuwm 2, 3, 2
+; P9BE-NEXT:    xxswapd 0, 2
+; P9BE-NEXT:    stxv 0, 0(3)
+; P9BE-NEXT:    blr
+;
+; P9BE-AIX-LABEL: test32:
+; P9BE-AIX:       # %bb.0: # %entry
+; P9BE-AIX-NEXT:    add 5, 3, 4
+; P9BE-AIX-NEXT:    lxsiwzx 2, 3, 4
+; P9BE-AIX-NEXT:    ld 3, L..C2(2) # %const.0
+; P9BE-AIX-NEXT:    xxlxor 3, 3, 3
+; P9BE-AIX-NEXT:    lxv 4, 0(3)
+; P9BE-AIX-NEXT:    li 3, 4
+; P9BE-AIX-NEXT:    lxsiwzx 5, 5, 3
+; P9BE-AIX-NEXT:    vperm 2, 3, 2, 4
+; P9BE-AIX-NEXT:    vperm 3, 3, 5, 4
+; P9BE-AIX-NEXT:    vspltisw 4, 8
+; P9BE-AIX-NEXT:    vnegw 3, 3
+; P9BE-AIX-NEXT:    vadduwm 4, 4, 4
+; P9BE-AIX-NEXT:    vslw 3, 3, 4
+; P9BE-AIX-NEXT:    vsubuwm 2, 3, 2
+; P9BE-AIX-NEXT:    xxswapd 0, 2
+; P9BE-AIX-NEXT:    stxv 0, 0(3)
+; P9BE-AIX-NEXT:    blr
+;
+; P9BE-AIX32-LABEL: test32:
+; P9BE-AIX32:       # %bb.0: # %entry
+; P9BE-AIX32-NEXT:    add 5, 3, 4
+; P9BE-AIX32-NEXT:    lxsiwzx 2, 3, 4
+; P9BE-AIX32-NEXT:    lwz 3, L..C2(2) # %const.0
+; P9BE-AIX32-NEXT:    xxlxor 3, 3, 3
+; P9BE-AIX32-NEXT:    lxv 4, 0(3)
+; P9BE-AIX32-NEXT:    li 3, 4
+; P9BE-AIX32-NEXT:    lxsiwzx 5, 5, 3
+; P9BE-AIX32-NEXT:    vperm 2, 3, 2, 4
+; P9BE-AIX32-NEXT:    vperm 3, 3, 5, 4
+; P9BE-AIX32-NEXT:    vspltisw 4, 8
+; P9BE-AIX32-NEXT:    vnegw 3, 3
+; P9BE-AIX32-NEXT:    vadduwm 4, 4, 4
+; P9BE-AIX32-NEXT:    vslw 3, 3, 4
+; P9BE-AIX32-NEXT:    vsubuwm 2, 3, 2
+; P9BE-AIX32-NEXT:    xxswapd 0, 2
+; P9BE-AIX32-NEXT:    stxv 0, 0(3)
+; P9BE-AIX32-NEXT:    blr
 entry:
   %idx.ext63 = sext i32 %i_pix2 to i64
   %add.ptr64 = getelementptr inbounds i8, i8* %pix2, i64 %idx.ext63
@@ -93,17 +242,111 @@ entry:
 }
 
 define void @test16(i16* nocapture readonly %sums, i32 signext %delta, i32 signext %thresh) {
-; CHECK-LABEL: test16
-; CHECK-NOT: lhzux
-; CHECK: lxsihzx [[REG:[0-9]+]]
-; CHECK: vmrghh {{[0-9]+}}, {{[0-9]+}}, [[REG]]
-; P9BE-LABEL: test16
-; P9BE-NOT: lhzux
-; P9BE: lxsihzx [[REG:[0-9]+]]
-; P9BE: vperm {{[0-9]+}}, {{[0-9]+}}, [[REG]]
-; P9BE-32-LABEL: test16:
-; P9BE-32: lhzux [[REG1:[0-9]+]]
-; P9BE-32: vmrghh {{[0-9]+}}, {{[0-9]+}}, [[REG1]]
+; P9LE-LABEL: test16:
+; P9LE:       # %bb.0: # %entry
+; P9LE-NEXT:    sldi 4, 4, 1
+; P9LE-NEXT:    li 7, 16
+; P9LE-NEXT:    add 6, 3, 4
+; P9LE-NEXT:    lxsihzx 4, 3, 4
+; P9LE-NEXT:    addis 3, 2, .LCPI2_0 at toc@ha
+; P9LE-NEXT:    lxsihzx 2, 6, 7
+; P9LE-NEXT:    li 6, 0
+; P9LE-NEXT:    addi 3, 3, .LCPI2_0 at toc@l
+; P9LE-NEXT:    mtvsrd 3, 6
+; P9LE-NEXT:    vmrghh 4, 3, 4
+; P9LE-NEXT:    vmrghh 2, 3, 2
+; P9LE-NEXT:    vsplth 3, 3, 3
+; P9LE-NEXT:    xxmrglw 3, 4, 3
+; P9LE-NEXT:    lxv 4, 0(3)
+; P9LE-NEXT:    li 3, 0
+; P9LE-NEXT:    vperm 2, 2, 3, 4
+; P9LE-NEXT:    xxspltw 3, 2, 2
+; P9LE-NEXT:    vadduwm 2, 2, 3
+; P9LE-NEXT:    vextuwrx 3, 3, 2
+; P9LE-NEXT:    cmpw 3, 5
+; P9LE-NEXT:    bgelr+ 0
+; P9LE-NEXT:  # %bb.1: # %if.then
+;
+; P9BE-LABEL: test16:
+; P9BE:       # %bb.0: # %entry
+; P9BE-NEXT:    sldi 4, 4, 1
+; P9BE-NEXT:    li 7, 16
+; P9BE-NEXT:    add 6, 3, 4
+; P9BE-NEXT:    lxsihzx 5, 3, 4
+; P9BE-NEXT:    addis 3, 2, .LCPI2_1 at toc@ha
+; P9BE-NEXT:    lxsihzx 2, 6, 7
+; P9BE-NEXT:    addis 6, 2, .LCPI2_0 at toc@ha
+; P9BE-NEXT:    addi 3, 3, .LCPI2_1 at toc@l
+; P9BE-NEXT:    addi 6, 6, .LCPI2_0 at toc@l
+; P9BE-NEXT:    lxv 3, 0(6)
+; P9BE-NEXT:    li 6, 0
+; P9BE-NEXT:    mtvsrwz 4, 6
+; P9BE-NEXT:    vperm 2, 4, 2, 3
+; P9BE-NEXT:    vperm 3, 4, 5, 3
+; P9BE-NEXT:    vsplth 4, 4, 3
+; P9BE-NEXT:    xxmrghw 3, 4, 3
+; P9BE-NEXT:    lxv 4, 0(3)
+; P9BE-NEXT:    li 3, 0
+; P9BE-NEXT:    vperm 2, 3, 2, 4
+; P9BE-NEXT:    xxspltw 3, 2, 1
+; P9BE-NEXT:    vadduwm 2, 2, 3
+; P9BE-NEXT:    vextuwlx 3, 3, 2
+; P9BE-NEXT:    cmpw 3, 5
+; P9BE-NEXT:    bgelr+ 0
+; P9BE-NEXT:  # %bb.1: # %if.then
+;
+; P9BE-AIX-LABEL: test16:
+; P9BE-AIX:       # %bb.0: # %entry
+; P9BE-AIX-NEXT:    sldi 4, 4, 1
+; P9BE-AIX-NEXT:    li 7, 16
+; P9BE-AIX-NEXT:    add 6, 3, 4
+; P9BE-AIX-NEXT:    lxsihzx 5, 3, 4
+; P9BE-AIX-NEXT:    ld 3, L..C3(2) # %const.1
+; P9BE-AIX-NEXT:    lxsihzx 2, 6, 7
+; P9BE-AIX-NEXT:    ld 6, L..C4(2) # %const.0
+; P9BE-AIX-NEXT:    lxv 3, 0(6)
+; P9BE-AIX-NEXT:    li 6, 0
+; P9BE-AIX-NEXT:    mtvsrwz 4, 6
+; P9BE-AIX-NEXT:    vperm 2, 4, 2, 3
+; P9BE-AIX-NEXT:    vperm 3, 4, 5, 3
+; P9BE-AIX-NEXT:    vsplth 4, 4, 3
+; P9BE-AIX-NEXT:    xxmrghw 3, 4, 3
+; P9BE-AIX-NEXT:    lxv 4, 0(3)
+; P9BE-AIX-NEXT:    li 3, 0
+; P9BE-AIX-NEXT:    vperm 2, 3, 2, 4
+; P9BE-AIX-NEXT:    xxspltw 3, 2, 1
+; P9BE-AIX-NEXT:    vadduwm 2, 2, 3
+; P9BE-AIX-NEXT:    vextuwlx 3, 3, 2
+; P9BE-AIX-NEXT:    cmpw 3, 5
+; P9BE-AIX-NEXT:    bgelr+ 0
+; P9BE-AIX-NEXT:  # %bb.1: # %if.then
+;
+; P9BE-AIX32-LABEL: test16:
+; P9BE-AIX32:       # %bb.0: # %entry
+; P9BE-AIX32-NEXT:    slwi 4, 4, 1
+; P9BE-AIX32-NEXT:    li 6, 0
+; P9BE-AIX32-NEXT:    lhzux 4, 3, 4
+; P9BE-AIX32-NEXT:    lhz 3, 16(3)
+; P9BE-AIX32-NEXT:    sth 6, -64(1)
+; P9BE-AIX32-NEXT:    lxv 2, -64(1)
+; P9BE-AIX32-NEXT:    sth 4, -48(1)
+; P9BE-AIX32-NEXT:    lxv 4, -48(1)
+; P9BE-AIX32-NEXT:    sth 3, -32(1)
+; P9BE-AIX32-NEXT:    lwz 3, L..C3(2) # %const.0
+; P9BE-AIX32-NEXT:    lxv 3, -32(1)
+; P9BE-AIX32-NEXT:    vmrghh 4, 2, 4
+; P9BE-AIX32-NEXT:    vmrghh 3, 2, 3
+; P9BE-AIX32-NEXT:    vsplth 2, 2, 0
+; P9BE-AIX32-NEXT:    xxmrghw 2, 2, 4
+; P9BE-AIX32-NEXT:    lxv 4, 0(3)
+; P9BE-AIX32-NEXT:    vperm 2, 2, 3, 4
+; P9BE-AIX32-NEXT:    xxspltw 3, 2, 1
+; P9BE-AIX32-NEXT:    vadduwm 2, 2, 3
+; P9BE-AIX32-NEXT:    stxv 2, -16(1)
+; P9BE-AIX32-NEXT:    lwz 3, -16(1)
+; P9BE-AIX32-NEXT:    cmpw 3, 5
+; P9BE-AIX32-NEXT:    bgelr+ 0
+; P9BE-AIX32-NEXT:  # %bb.1: # %if.then
 entry:
   %idxprom = sext i32 %delta to i64
   %add14 = add nsw i32 %delta, 8
@@ -137,17 +380,115 @@ if.end:                                           ; preds = %for.body
 }
 
 define void @test8(i8* nocapture readonly %sums, i32 signext %delta, i32 signext %thresh) {
-; CHECK-LABEL: test8:
-; CHECK-NOT: lbzux
-; CHECK: lxsibzx [[REG:[0-9]+]]
-; CHECK: vmrghb {{[0-9]+}}, {{[0-9]+}}, [[REG]]
+; P9LE-LABEL: test8:
+; P9LE:       # %bb.0: # %entry
+; P9LE-NEXT:    add 6, 3, 4
+; P9LE-NEXT:    lxsibzx 2, 3, 4
+; P9LE-NEXT:    li 3, 0
+; P9LE-NEXT:    mtvsrd 3, 3
+; P9LE-NEXT:    li 3, 8
+; P9LE-NEXT:    lxsibzx 5, 6, 3
+; P9LE-NEXT:    vspltb 4, 3, 7
+; P9LE-NEXT:    addis 3, 2, .LCPI3_0 at toc@ha
+; P9LE-NEXT:    vmrghb 2, 3, 2
+; P9LE-NEXT:    addi 3, 3, .LCPI3_0 at toc@l
+; P9LE-NEXT:    vmrglh 2, 2, 4
+; P9LE-NEXT:    vmrghb 3, 3, 5
+; P9LE-NEXT:    xxmrglw 2, 2, 4
+; P9LE-NEXT:    vmrglh 3, 3, 4
+; P9LE-NEXT:    xxmrglw 3, 4, 3
+; P9LE-NEXT:    lxv 4, 0(3)
+; P9LE-NEXT:    li 3, 0
+; P9LE-NEXT:    vperm 2, 3, 2, 4
+; P9LE-NEXT:    xxspltw 3, 2, 2
+; P9LE-NEXT:    vadduwm 2, 2, 3
+; P9LE-NEXT:    vextuwrx 3, 3, 2
+; P9LE-NEXT:    cmpw 3, 5
+; P9LE-NEXT:    bgelr+ 0
+; P9LE-NEXT:  # %bb.1: # %if.then
+;
 ; P9BE-LABEL: test8:
-; P9BE-NOT: lbzux
-; P9BE: lxsibzx [[REG:[0-9]+]]
-; P9BE: vperm {{[0-9]+}}, {{[0-9]+}}, [[REG]]
-; P9BE-32-LABEL: test8:
-; P9BE-32: lxsibzx [[REG:[0-9]+]]
-; P9BE-32: vperm {{[0-9]+}}, {{[0-9]+}}, [[REG]]
+; P9BE:       # %bb.0: # %entry
+; P9BE-NEXT:    add 6, 3, 4
+; P9BE-NEXT:    li 7, 8
+; P9BE-NEXT:    lxsibzx 5, 3, 4
+; P9BE-NEXT:    addis 3, 2, .LCPI3_1 at toc@ha
+; P9BE-NEXT:    lxsibzx 2, 6, 7
+; P9BE-NEXT:    addis 6, 2, .LCPI3_0 at toc@ha
+; P9BE-NEXT:    addi 3, 3, .LCPI3_1 at toc@l
+; P9BE-NEXT:    addi 6, 6, .LCPI3_0 at toc@l
+; P9BE-NEXT:    lxv 3, 0(6)
+; P9BE-NEXT:    li 6, 0
+; P9BE-NEXT:    mtvsrwz 4, 6
+; P9BE-NEXT:    vperm 2, 4, 2, 3
+; P9BE-NEXT:    vperm 3, 4, 5, 3
+; P9BE-NEXT:    vspltb 4, 4, 7
+; P9BE-NEXT:    vmrghh 3, 3, 4
+; P9BE-NEXT:    xxspltw 4, 4, 0
+; P9BE-NEXT:    xxmrghw 2, 3, 2
+; P9BE-NEXT:    lxv 3, 0(3)
+; P9BE-NEXT:    li 3, 0
+; P9BE-NEXT:    vperm 2, 4, 2, 3
+; P9BE-NEXT:    xxspltw 3, 2, 1
+; P9BE-NEXT:    vadduwm 2, 2, 3
+; P9BE-NEXT:    vextuwlx 3, 3, 2
+; P9BE-NEXT:    cmpw 3, 5
+; P9BE-NEXT:    bgelr+ 0
+; P9BE-NEXT:  # %bb.1: # %if.then
+;
+; P9BE-AIX-LABEL: test8:
+; P9BE-AIX:       # %bb.0: # %entry
+; P9BE-AIX-NEXT:    add 6, 3, 4
+; P9BE-AIX-NEXT:    li 7, 8
+; P9BE-AIX-NEXT:    lxsibzx 5, 3, 4
+; P9BE-AIX-NEXT:    ld 3, L..C5(2) # %const.1
+; P9BE-AIX-NEXT:    lxsibzx 2, 6, 7
+; P9BE-AIX-NEXT:    ld 6, L..C6(2) # %const.0
+; P9BE-AIX-NEXT:    lxv 3, 0(6)
+; P9BE-AIX-NEXT:    li 6, 0
+; P9BE-AIX-NEXT:    mtvsrwz 4, 6
+; P9BE-AIX-NEXT:    vperm 2, 4, 2, 3
+; P9BE-AIX-NEXT:    vperm 3, 4, 5, 3
+; P9BE-AIX-NEXT:    vspltb 4, 4, 7
+; P9BE-AIX-NEXT:    vmrghh 3, 3, 4
+; P9BE-AIX-NEXT:    xxspltw 4, 4, 0
+; P9BE-AIX-NEXT:    xxmrghw 2, 3, 2
+; P9BE-AIX-NEXT:    lxv 3, 0(3)
+; P9BE-AIX-NEXT:    li 3, 0
+; P9BE-AIX-NEXT:    vperm 2, 4, 2, 3
+; P9BE-AIX-NEXT:    xxspltw 3, 2, 1
+; P9BE-AIX-NEXT:    vadduwm 2, 2, 3
+; P9BE-AIX-NEXT:    vextuwlx 3, 3, 2
+; P9BE-AIX-NEXT:    cmpw 3, 5
+; P9BE-AIX-NEXT:    bgelr+ 0
+; P9BE-AIX-NEXT:  # %bb.1: # %if.then
+;
+; P9BE-AIX32-LABEL: test8:
+; P9BE-AIX32:       # %bb.0: # %entry
+; P9BE-AIX32-NEXT:    add 6, 3, 4
+; P9BE-AIX32-NEXT:    li 7, 8
+; P9BE-AIX32-NEXT:    lxsibzx 5, 3, 4
+; P9BE-AIX32-NEXT:    lwz 3, L..C4(2) # %const.1
+; P9BE-AIX32-NEXT:    lxsibzx 2, 6, 7
+; P9BE-AIX32-NEXT:    lwz 6, L..C5(2) # %const.0
+; P9BE-AIX32-NEXT:    lxv 3, 0(6)
+; P9BE-AIX32-NEXT:    li 6, 0
+; P9BE-AIX32-NEXT:    mtvsrwz 4, 6
+; P9BE-AIX32-NEXT:    vperm 2, 4, 2, 3
+; P9BE-AIX32-NEXT:    vperm 3, 4, 5, 3
+; P9BE-AIX32-NEXT:    vspltb 4, 4, 7
+; P9BE-AIX32-NEXT:    vmrghh 3, 3, 4
+; P9BE-AIX32-NEXT:    xxspltw 4, 4, 0
+; P9BE-AIX32-NEXT:    xxmrghw 2, 3, 2
+; P9BE-AIX32-NEXT:    lxv 3, 0(3)
+; P9BE-AIX32-NEXT:    vperm 2, 4, 2, 3
+; P9BE-AIX32-NEXT:    xxspltw 3, 2, 1
+; P9BE-AIX32-NEXT:    vadduwm 2, 2, 3
+; P9BE-AIX32-NEXT:    stxv 2, -16(1)
+; P9BE-AIX32-NEXT:    lwz 3, -16(1)
+; P9BE-AIX32-NEXT:    cmpw 3, 5
+; P9BE-AIX32-NEXT:    bgelr+ 0
+; P9BE-AIX32-NEXT:  # %bb.1: # %if.then
 entry:
   %idxprom = sext i32 %delta to i64
   %add14 = add nsw i32 %delta, 8


        


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