[PATCH] D127530: [PowerPC] Extend GlobalISel implementation to emit and/or/xor.

[Kai Nacke via Phabricator via llvm-commits]

Kai created this revision.
Kai added reviewers: nemanjai, saghir.
Herald added subscribers: shchenz, kbarton, hiraditya, rovka.
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Adds some more code to GlobalISel to enable instruction selection for and/or/xor.

- Makes G_IMPLICIT_DEF, G_AND, G_OR, G_XOR legal for 64bit register size.
- Implement lowerReturn in CallLowering
- Provides mapping of the operands to register banks.
- Adds register info to G_COPY operands.

The utility functions are all only implemented so far to support this use case.
Especially the functions in PPCGenRegisterBankInfo.def are too simple for
general use.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D127530

Files:
  llvm/lib/Target/PowerPC/GISel/PPCCallLowering.cpp
  llvm/lib/Target/PowerPC/GISel/PPCGenRegisterBankInfo.def
  llvm/lib/Target/PowerPC/GISel/PPCInstructionSelector.cpp
  llvm/lib/Target/PowerPC/GISel/PPCLegalizerInfo.cpp
  llvm/lib/Target/PowerPC/GISel/PPCRegisterBankInfo.cpp
  llvm/lib/Target/PowerPC/GISel/PPCRegisterBankInfo.h
  llvm/test/CodeGen/PowerPC/GlobalISel/ppc-isel-logical.ll

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