[llvm] eccbe6d - [TableGen][CodeEmitterGen] Do not crash on insufficient positional instruction operands.

Ivan Kosarev via llvm-commits llvm-commits at lists.llvm.org
Fri Jun 10 06:39:22 PDT 2022


Author: Ivan Kosarev
Date: 2022-06-10T14:38:54+01:00
New Revision: eccbe6d1226ae6ad44f06532d9427fac50d25b98

URL: https://github.com/llvm/llvm-project/commit/eccbe6d1226ae6ad44f06532d9427fac50d25b98
DIFF: https://github.com/llvm/llvm-project/commit/eccbe6d1226ae6ad44f06532d9427fac50d25b98.diff

LOG: [TableGen][CodeEmitterGen] Do not crash on insufficient positional instruction operands.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D126288

Added: 
    llvm/test/TableGen/InsufficientPositionalOperands.td

Modified: 
    llvm/utils/TableGen/CodeEmitterGen.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/test/TableGen/InsufficientPositionalOperands.td b/llvm/test/TableGen/InsufficientPositionalOperands.td
new file mode 100644
index 000000000000..5927bf9ce440
--- /dev/null
+++ b/llvm/test/TableGen/InsufficientPositionalOperands.td
@@ -0,0 +1,30 @@
+// RUN: not llvm-tblgen -gen-emitter -I %p/../../include %s 2>&1 | FileCheck %s
+
+// Check that TableGen doesn't crash on insufficient positional
+// instruction operands.
+
+include "llvm/Target/Target.td"
+
+def ArchInstrInfo : InstrInfo { }
+
+def Arch : Target {
+  let InstructionSet = ArchInstrInfo;
+}
+
+def Reg : Register<"reg">;
+
+def Regs : RegisterClass<"foo", [i32], 0, (add Reg)>;
+
+def foo : Instruction {
+  bits<3> rd;
+  bits<3> rs;
+
+  bits<8> Inst;
+  let Inst{1-0} = 0;
+  let Inst{4-2} = rd;
+  let Inst{7-5} = rs;
+
+// CHECK: Too few operands in record foo (no match for variable rs)
+  let OutOperandList = (outs Regs:$xd);
+  let InOperandList = (ins);
+}

diff  --git a/llvm/utils/TableGen/CodeEmitterGen.cpp b/llvm/utils/TableGen/CodeEmitterGen.cpp
index 8f96b7ffc279..2b9931b23c11 100644
--- a/llvm/utils/TableGen/CodeEmitterGen.cpp
+++ b/llvm/utils/TableGen/CodeEmitterGen.cpp
@@ -22,6 +22,7 @@
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/Support/Casting.h"
 #include "llvm/Support/raw_ostream.h"
+#include "llvm/TableGen/Error.h"
 #include "llvm/TableGen/Record.h"
 #include "llvm/TableGen/TableGenBackend.h"
 #include <cassert>
@@ -118,16 +119,16 @@ AddCodeToMergeInOperand(Record *R, BitsInit *BI, const std::string &VarName,
               (!NamedOpIndices.empty() && NamedOpIndices.count(
                 CGI.Operands.getSubOperandNumber(NumberedOp).first)))) {
       ++NumberedOp;
+    }
 
-      if (NumberedOp >= CGI.Operands.back().MIOperandNo +
-                        CGI.Operands.back().MINumOperands) {
-        errs() << "Too few operands in record " << R->getName() <<
-                  " (no match for variable " << VarName << "):\n";
-        errs() << *R;
-        errs() << '\n';
-
-        return;
-      }
+    if (NumberedOp >=
+        CGI.Operands.back().MIOperandNo + CGI.Operands.back().MINumOperands) {
+      std::string E;
+      raw_string_ostream S(E);
+      S << "Too few operands in record " << R->getName()
+        << " (no match for variable " << VarName << "):\n";
+      S << *R;
+      PrintFatalError(R, E);
     }
 
     OpIdx = NumberedOp++;


        


More information about the llvm-commits mailing list