[llvm] e018e49 - [RISCV] move `isFaultFirstLoad` into `RISCVInstrInfo`
Shao-Ce SUN via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 10 06:04:09 PDT 2022
Author: Shao-Ce SUN
Date: 2022-06-10T21:03:47+08:00
New Revision: e018e493c1ac514504bbaa1d1396aec025142a31
URL: https://github.com/llvm/llvm-project/commit/e018e493c1ac514504bbaa1d1396aec025142a31
DIFF: https://github.com/llvm/llvm-project/commit/e018e493c1ac514504bbaa1d1396aec025142a31.diff
LOG: [RISCV] move `isFaultFirstLoad` into `RISCVInstrInfo`
Fix build errors in D126794
```
ld.lld: error: undefined symbol: llvm::MachineInstr::getNumExplicitDefs() const
>>> referenced by RISCVBaseInfo.cpp
>>> RISCVBaseInfo.cpp.o:(llvm::isFaultFirstLoad(llvm::MachineInstr const&)) in archive lib/libLLVMRISCVDesc.a
ld.lld: error: undefined symbol: llvm::MachineInstr::findRegisterDefOperandIdx(llvm::Register, bool, bool, llvm::TargetRegisterInfo const*) const
>>> referenced by RISCVBaseInfo.cpp
>>> RISCVBaseInfo.cpp.o:(llvm::isFaultFirstLoad(llvm::MachineInstr const&)) in archive lib/libLLVMRISCVDesc.a
clang-15: error: linker command failed with exit code 1 (use -v to see invocation)
```
Reviewed By: fakepaper56
Differential Revision: https://reviews.llvm.org/D127477
Added:
Modified:
llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
llvm/lib/Target/RISCV/RISCVMCInstLower.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
index b3c53c9bd5266..9b69170d1c4a6 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
@@ -182,9 +182,4 @@ void RISCVVType::printVType(unsigned VType, raw_ostream &OS) {
OS << ", mu";
}
-bool isFaultFirstLoad(const MachineInstr &MI) {
- return MI.getNumExplicitDefs() == 2 && MI.modifiesRegister(RISCV::VL) &&
- !MI.isInlineAsm();
-}
-
} // namespace llvm
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
index 9e343a21e7bc9..c7d88d80d7230 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
@@ -433,7 +433,13 @@ void printVType(unsigned VType, raw_ostream &OS);
} // namespace RISCVVType
-bool isFaultFirstLoad(const MachineInstr &MI);
+namespace RISCVVInstInfo {
+inline static bool isFaultFirstLoad(const MachineInstr &MI) {
+ return MI.getNumExplicitDefs() == 2 && MI.modifiesRegister(RISCV::VL) &&
+ !MI.isInlineAsm();
+}
+} // namespace RISCVVInstInfo
+
} // namespace llvm
#endif
diff --git a/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp b/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
index 866a6d8edb395..9db14dbcc55d6 100644
--- a/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
+++ b/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
@@ -1414,7 +1414,7 @@ void RISCVInsertVSETVLI::doLocalPostpass(MachineBasicBlock &MBB) {
void RISCVInsertVSETVLI::insertReadVL(MachineBasicBlock &MBB) {
for (auto I = MBB.begin(), E = MBB.end(); I != E;) {
MachineInstr &MI = *I++;
- if (isFaultFirstLoad(MI)) {
+ if (RISCVVInstInfo::isFaultFirstLoad(MI)) {
Register VLOutput = MI.getOperand(1).getReg();
if (!MRI->use_nodbg_empty(VLOutput))
BuildMI(MBB, I, MI.getDebugLoc(), TII->get(RISCV::PseudoReadVL),
diff --git a/llvm/lib/Target/RISCV/RISCVMCInstLower.cpp b/llvm/lib/Target/RISCV/RISCVMCInstLower.cpp
index e341f82db95da..530b9b03f74a2 100644
--- a/llvm/lib/Target/RISCV/RISCVMCInstLower.cpp
+++ b/llvm/lib/Target/RISCV/RISCVMCInstLower.cpp
@@ -158,7 +158,7 @@ static bool lowerRISCVVMachineInstrToMCInst(const MachineInstr *MI,
if (RISCVII::hasSEWOp(TSFlags))
--NumOps;
- bool hasVLOutput = isFaultFirstLoad(*MI);
+ bool hasVLOutput = RISCVVInstInfo::isFaultFirstLoad(*MI);
for (unsigned OpNo = 0; OpNo != NumOps; ++OpNo) {
const MachineOperand &MO = MI->getOperand(OpNo);
// Skip vl ouput. It should be the second output.
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