[PATCH] D127317: [AArch64][SME] Add ldr/str (fill/spill) intrinsics

Cullen Rhodes via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jun 10 01:35:19 PDT 2022


c-rhodes added inline comments.


================
Comment at: llvm/lib/Target/AArch64/SMEInstrFormats.td:25
 
+def am_sme_indexed_s4 :ComplexPattern<iPTR, 2, "SelectAddrModeIndexedSVE<0,15>", [], [SDNPWantRoot]>;
+
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I think s4 implies 4-bit signed?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D127317/new/

https://reviews.llvm.org/D127317



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