[PATCH] D126700: [MachineScheduler] Order more stores by ascending address
Dave Green via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 10 00:53:06 PDT 2022
dmgreen added inline comments.
================
Comment at: llvm/lib/Target/AArch64/AArch64.td:219
+def FeatureAscendStoreAddress : SubtargetFeature<"ascend-store-address",
+ "IsStoreAddressAscend", "false", "schedule to ascend the address of stores">;
+
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Capitalize Schedule. Maybe reword as "Schedule vector stores by ascending address".
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Comment at: llvm/lib/Target/AArch64/AArch64InstrInfo.h:106
+ static bool isPairedLdSt(const MachineInstr &MI);
+
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Can you add a /// doc string
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Comment at: llvm/lib/Target/AArch64/AArch64InstrInfo.h:497-498
unsigned getBLRCallOpcode(const MachineFunction &MF);
+const MachineOperand &getLdStBaseOp(const MachineInstr &MI);
+const MachineOperand &getLdStOffsetOp(const MachineInstr &MI);
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I think you can probably move these into AArch64InstrInfo, near to isPairedLdSt
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Comment at: llvm/lib/Target/AArch64/AArch64MachineScheduler.cpp:29
+ case AArch64::STPQi:
+ return getLdStOffsetOp(*MI).getType() == MachineOperand::MO_Immediate;
+ }
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Why do we need to check it is an immediate?
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D126700/new/
https://reviews.llvm.org/D126700
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