[PATCH] D127281: [Greedy RegAlloc] Fix the handling of split register in last chance re-coloring.

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/lib/CodeGen/RegAllocGreedy.cpp:1907
       std::tie(LI, PhysReg) = RecolorStack[I];
-      Matrix->assign(*LI, PhysReg);
+      if (!LI->empty() && !MRI->reg_nodbg_empty(LI->reg()))
+        Matrix->assign(*LI, PhysReg);
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Why are both checks necessary? Why isn't LI->empty sufficient?


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Comment at: llvm/test/CodeGen/AArch64/regalloc-last-chance-recolor-with-split.mir:2
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mattr="+reserve-x28" --run-pass=greedy -verify-machineinstrs %s -o - | FileCheck %s
 
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Probably should also run virtregrewriter


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D127281/new/

https://reviews.llvm.org/D127281