[llvm] 7ac33b8 - [X86] Remove !VT.is128BitVector() check. NFCI.

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Thu Jun 9 13:39:54 PDT 2022


Author: Simon Pilgrim
Date: 2022-06-09T21:39:45+01:00
New Revision: 7ac33b8aac80cb1b49405ccd01b0e80206c9e806

URL: https://github.com/llvm/llvm-project/commit/7ac33b8aac80cb1b49405ccd01b0e80206c9e806
DIFF: https://github.com/llvm/llvm-project/commit/7ac33b8aac80cb1b49405ccd01b0e80206c9e806.diff

LOG: [X86] Remove !VT.is128BitVector() check. NFCI.

The code is inside a if(VT.is256BitVector() || VT.is512BitVector()) condition

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86ISelLowering.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 927484194990..2d9e59b50008 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -19787,7 +19787,7 @@ SDValue X86TargetLowering::LowerINSERT_VECTOR_ELT(SDValue Op,
     // If we are not inserting into the low 128-bit vector chunk,
     // then prefer the broadcast+blend sequence.
     // FIXME: relax the profitability check iff all N1 uses are insertions.
-    if (!VT.is128BitVector() && IdxVal >= NumEltsIn128 &&
+    if (IdxVal >= NumEltsIn128 &&
         ((Subtarget.hasAVX2() && EltSizeInBits != 8) ||
          (Subtarget.hasAVX() && (EltSizeInBits >= 32) &&
           X86::mayFoldLoad(N1, Subtarget)))) {


        


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